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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/dcm/
A Dmtk_dcm_utils.h37 void dcm_mp_cpusys_top_adb_dcm(bool on);
39 void dcm_mp_cpusys_top_apb_dcm(bool on);
41 void dcm_mp_cpusys_top_bus_pll_div_dcm(bool on);
43 void dcm_mp_cpusys_top_core_stall_dcm(bool on);
45 void dcm_mp_cpusys_top_cpubiu_dcm(bool on);
47 void dcm_mp_cpusys_top_cpu_pll_div_0_dcm(bool on);
49 void dcm_mp_cpusys_top_cpu_pll_div_1_dcm(bool on);
57 void dcm_mp_cpusys_top_fcm_stall_dcm(bool on);
61 void dcm_mp_cpusys_top_misc_dcm(bool on);
63 void dcm_mp_cpusys_top_mp0_qdcm(bool on);
[all …]
A Dmtk_dcm.c17 static void dcm_mcusys(bool on) in dcm_mcusys() argument
19 dcm_mp_cpusys_top_adb_dcm(on); in dcm_mcusys()
20 dcm_mp_cpusys_top_apb_dcm(on); in dcm_mcusys()
21 dcm_mp_cpusys_top_cpubiu_dcm(on); in dcm_mcusys()
22 dcm_mp_cpusys_top_misc_dcm(on); in dcm_mcusys()
23 dcm_mp_cpusys_top_mp0_qdcm(on); in dcm_mcusys()
24 dcm_cpccfg_reg_emi_wfifo(on); in dcm_mcusys()
25 dcm_mp_cpusys_top_last_cor_idle_dcm(on); in dcm_mcusys()
28 static void dcm_stall(bool on) in dcm_stall() argument
30 dcm_mp_cpusys_top_core_stall_dcm(on); in dcm_stall()
[all …]
A Dmtk_dcm_utils.c61 if (on) { in dcm_mp_cpusys_top_adb_dcm()
115 if (on) { in dcm_mp_cpusys_top_apb_dcm()
157 if (on) { in dcm_mp_cpusys_top_bus_pll_div_dcm()
187 if (on) { in dcm_mp_cpusys_top_core_stall_dcm()
217 if (on) { in dcm_mp_cpusys_top_cpubiu_dcm()
247 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_0_dcm()
277 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
307 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_2_dcm()
337 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_3_dcm()
367 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_4_dcm()
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/dcm/
A Dmtk_dcm_utils.h33 void dcm_mp_cpusys_top_adb_dcm(bool on);
35 void dcm_mp_cpusys_top_apb_dcm(bool on);
37 void dcm_mp_cpusys_top_bus_pll_div_dcm(bool on);
39 void dcm_mp_cpusys_top_core_stall_dcm(bool on);
41 void dcm_mp_cpusys_top_cpubiu_dbg_cg(bool on);
43 void dcm_mp_cpusys_top_cpubiu_dcm(bool on);
45 void dcm_mp_cpusys_top_cpu_pll_div_0_dcm(bool on);
49 void dcm_mp_cpusys_top_fcm_stall_dcm(bool on);
53 void dcm_mp_cpusys_top_misc_dcm(bool on);
55 void dcm_mp_cpusys_top_mp0_qdcm(bool on);
[all …]
A Dmtk_dcm.c18 static void dcm_mcusys(bool on) in dcm_mcusys() argument
20 dcm_mp_cpusys_top_adb_dcm(on); in dcm_mcusys()
21 dcm_mp_cpusys_top_apb_dcm(on); in dcm_mcusys()
22 dcm_mp_cpusys_top_cpubiu_dcm(on); in dcm_mcusys()
23 dcm_mp_cpusys_top_cpubiu_dbg_cg(on); in dcm_mcusys()
24 dcm_mp_cpusys_top_misc_dcm(on); in dcm_mcusys()
25 dcm_mp_cpusys_top_mp0_qdcm(on); in dcm_mcusys()
26 dcm_cpccfg_reg_emi_wfifo(on); in dcm_mcusys()
30 static void dcm_stall(bool on) in dcm_stall() argument
32 dcm_mp_cpusys_top_core_stall_dcm(on); in dcm_stall()
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A Dmtk_dcm_utils.c49 if (on) { in dcm_mp_cpusys_top_adb_dcm()
97 if (on) { in dcm_mp_cpusys_top_apb_dcm()
145 if (on) { in dcm_mp_cpusys_top_bus_pll_div_dcm()
175 if (on) { in dcm_mp_cpusys_top_core_stall_dcm()
205 if (on) { in dcm_mp_cpusys_top_cpubiu_dbg_cg()
235 if (on) { in dcm_mp_cpusys_top_cpubiu_dcm()
271 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_0_dcm()
307 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
337 if (on) { in dcm_mp_cpusys_top_fcm_stall_dcm()
367 if (on) { in dcm_mp_cpusys_top_last_cor_idle_dcm()
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/dcm/
A Dmtk_dcm_utils.h34 void dcm_mp_cpusys_top_adb_dcm(bool on);
36 void dcm_mp_cpusys_top_apb_dcm(bool on);
38 void dcm_mp_cpusys_top_bus_pll_div_dcm(bool on);
40 void dcm_mp_cpusys_top_core_stall_dcm(bool on);
42 void dcm_mp_cpusys_top_cpubiu_dcm(bool on);
44 void dcm_mp_cpusys_top_cpu_pll_div_0_dcm(bool on);
46 void dcm_mp_cpusys_top_cpu_pll_div_1_dcm(bool on);
48 void dcm_mp_cpusys_top_fcm_stall_dcm(bool on);
52 void dcm_mp_cpusys_top_misc_dcm(bool on);
54 void dcm_mp_cpusys_top_mp0_qdcm(bool on);
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A Dmtk_dcm.c17 static void dcm_mcusys(bool on) in dcm_mcusys() argument
19 dcm_mp_cpusys_top_adb_dcm(on); in dcm_mcusys()
20 dcm_mp_cpusys_top_apb_dcm(on); in dcm_mcusys()
21 dcm_mp_cpusys_top_cpubiu_dcm(on); in dcm_mcusys()
22 dcm_mp_cpusys_top_misc_dcm(on); in dcm_mcusys()
23 dcm_mp_cpusys_top_mp0_qdcm(on); in dcm_mcusys()
24 dcm_cpccfg_reg_emi_wfifo(on); in dcm_mcusys()
25 dcm_mp_cpusys_top_last_cor_idle_dcm(on); in dcm_mcusys()
28 static void dcm_stall(bool on) in dcm_stall() argument
30 dcm_mp_cpusys_top_core_stall_dcm(on); in dcm_stall()
[all …]
A Dmtk_dcm_utils.c61 if (on) { in dcm_mp_cpusys_top_adb_dcm()
115 if (on) { in dcm_mp_cpusys_top_apb_dcm()
163 if (on) { in dcm_mp_cpusys_top_bus_pll_div_dcm()
193 if (on) { in dcm_mp_cpusys_top_core_stall_dcm()
223 if (on) { in dcm_mp_cpusys_top_cpubiu_dcm()
256 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_0_dcm()
289 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
319 if (on) { in dcm_mp_cpusys_top_fcm_stall_dcm()
349 if (on) { in dcm_mp_cpusys_top_last_cor_idle_dcm()
382 if (on) { in dcm_mp_cpusys_top_misc_dcm()
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/dcm/mt8188/
A Dmtk_dcm_utils.h34 void dcm_mp_cpusys_top_adb_dcm(bool on);
36 void dcm_mp_cpusys_top_apb_dcm(bool on);
38 void dcm_mp_cpusys_top_bus_pll_div_dcm(bool on);
40 void dcm_mp_cpusys_top_core_stall_dcm(bool on);
42 void dcm_mp_cpusys_top_cpubiu_dcm(bool on);
44 void dcm_mp_cpusys_top_cpu_pll_div_0_dcm(bool on);
46 void dcm_mp_cpusys_top_cpu_pll_div_1_dcm(bool on);
48 void dcm_mp_cpusys_top_fcm_stall_dcm(bool on);
52 void dcm_mp_cpusys_top_misc_dcm(bool on);
54 void dcm_mp_cpusys_top_mp0_qdcm(bool on);
[all …]
A Dmtk_dcm_utils.c45 if (on) { in dcm_mp_cpusys_top_adb_dcm()
99 if (on) { in dcm_mp_cpusys_top_apb_dcm()
139 if (on) { in dcm_mp_cpusys_top_bus_pll_div_dcm()
165 if (on) { in dcm_mp_cpusys_top_core_stall_dcm()
191 if (on) { in dcm_mp_cpusys_top_cpubiu_dcm()
217 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_0_dcm()
243 if (on) { in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
269 if (on) { in dcm_mp_cpusys_top_fcm_stall_dcm()
295 if (on) { in dcm_mp_cpusys_top_last_cor_idle_dcm()
321 if (on) { in dcm_mp_cpusys_top_misc_dcm()
[all …]
/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/dcm/
A Dmtk_dcm.c20 static void dcm_mcusys(bool on) in dcm_mcusys() argument
22 dcm_mp_cpusys_top_adb_dcm(on); in dcm_mcusys()
23 dcm_mp_cpusys_top_apb_dcm(on); in dcm_mcusys()
24 dcm_mp_cpusys_top_cpubiu_dcm(on); in dcm_mcusys()
25 dcm_mp_cpusys_top_misc_dcm(on); in dcm_mcusys()
26 dcm_mp_cpusys_top_mp0_qdcm(on); in dcm_mcusys()
29 dcm_cpccfg_reg_emi_wfifo(on); in dcm_mcusys()
30 dcm_mp_cpusys_top_last_cor_idle_dcm(on); in dcm_mcusys()
33 static void dcm_stall(bool on) in dcm_stall() argument
35 dcm_mp_cpusys_top_core_stall_dcm(on); in dcm_stall()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/drivers/mcdi/
A Dmtk_mcdi.h25 void mcdi_pause_set(int cluster, int cpu_idx, bool on);
26 void mcdi_pause_clr(int cluster, int cpu_idx, bool on);
27 void mcdi_hotplug_set(int cluster, int cpu_idx, bool on);
28 void mcdi_hotplug_clr(int cluster, int cpu_idx, bool on);
29 void mcdi_hotplug_wait_ack(int cluster, int cpu_idx, bool on);
A Dmtk_mcdi.c92 if (on) { in target_mask()
109 void mcdi_pause_clr(int cluster, int cpu_idx, bool on) in mcdi_pause_clr() argument
111 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_pause_clr()
118 void mcdi_pause_set(int cluster, int cpu_idx, bool on) in mcdi_pause_set() argument
120 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_pause_set()
122 uint32_t tgtn = target_mask(-1, cpu_idx, !on); in mcdi_pause_set()
157 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_hotplug_wait_ack()
167 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_hotplug_clr()
168 uint32_t tgt_cpu = target_mask(-1, cpu_idx, on); in mcdi_hotplug_clr()
185 uint32_t tgt = target_mask(cluster, cpu_idx, on); in mcdi_hotplug_set()
[all …]
/arm-trusted-firmware-2.8.0/docs/resources/diagrams/plantuml/
A Dio_dev_init_and_check.puml20 ref over io_storage : dev_init() on fip device
23 ref over io_storage : io_open() on fip device
26 ref over io_storage : io_close() on fip device
45 ref over io_storage : dev_init() on memmap device
48 ref over io_storage : io_open() on memmap device
51 ref over io_storage : io_close() on memmap device
A Dio_framework_usage_overview.puml37 ref over io_storage : io_open() on fip device
40 ref over io_storage : io_size() on fip device
42 ref over io_storage : io_read() on fip device
44 ref over io_storage : io_close() on fip device
46 ref over io_storage : io_dev_close() on fip device
/arm-trusted-firmware-2.8.0/plat/imx/imx8m/include/
A Dgpc.h30 #define IMX_PD_DOMAIN(name, on) \ argument
35 .always_on = (on), \
38 #define IMX_MIX_DOMAIN(name, on) \ argument
45 .always_on = (on), \
73 void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on);
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8173/drivers/mtcmos/
A Dmtcmos.c162 uint32_t wait_mtcmos_ack(uint32_t on, uint32_t pwr_ctrl, uint32_t spm_pwr_sta) in wait_mtcmos_ack() argument
172 if (cmp && (pwr_sta == on) && (pwr_sta_2nd == on)) { in wait_mtcmos_ack()
183 on, spm_pwr_sta, mmio_read_32(SPM_PCM_RESERVE), in wait_mtcmos_ack()
194 uint32_t mtcmos_non_cpu_ctrl(uint32_t on, uint32_t mtcmos_num) in mtcmos_non_cpu_ctrl() argument
263 power_ctrl = on ? (1 << power_on) : (1 << power_off); in mtcmos_non_cpu_ctrl()
265 ret = wait_mtcmos_ack(on, power_ctrl, power_status); in mtcmos_non_cpu_ctrl()
267 power_ctrl, on, mmio_read_32(SPM_PWR_STATUS), ret); in mtcmos_non_cpu_ctrl()
/arm-trusted-firmware-2.8.0/fdts/
A Dstm32mp15xx-dhcor-io1v8.dtsi9 /* Enpirion EP3A8LQI U2 on the DHCOR */
15 regulator-always-on;
16 regulator-boot-on;
A Dstm32mp157c-odyssey-som.dtsi26 regulator-always-on;
94 regulator-always-on;
103 regulator-always-on;
112 regulator-always-on;
122 regulator-always-on;
131 regulator-always-on;
138 regulator-always-on;
143 regulator-always-on;
152 regulator-always-on;
159 regulator-boot-on;
[all …]
A Dstm32mp15xx-osd32.dtsi35 regulator-always-on;
44 regulator-always-on;
53 regulator-always-on;
63 regulator-always-on;
72 regulator-always-on;
79 regulator-always-on;
84 regulator-always-on;
99 regulator-boot-on;
106 regulator-always-on;
111 regulator-always-on;
A Dstm32mp15xx-dkx.dtsi21 regulator-always-on;
85 regulator-always-on;
94 regulator-always-on;
103 regulator-always-on;
113 regulator-always-on;
122 regulator-always-on;
129 regulator-always-on;
134 regulator-always-on;
149 regulator-boot-on;
156 regulator-always-on;
[all …]
A Dstm32mp15xx-dhcom-som.dtsi67 regulator-always-on;
76 regulator-always-on;
85 regulator-always-on;
95 regulator-always-on;
104 regulator-always-on;
115 regulator-always-on;
130 regulator-boot-on;
141 regulator-always-on;
307 * - optional on SoMs with SD voltage translator
308 * - mandatory on SoMs without SD voltage translator
A Dstm32mp135f-dk.dts40 regulator-always-on;
48 regulator-always-on;
101 regulator-always-on;
109 regulator-always-on;
117 regulator-always-on;
126 regulator-always-on;
146 regulator-boot-on;
157 regulator-always-on;
167 regulator-always-on;
/arm-trusted-firmware-2.8.0/docs/perf/
A Dpsci-performance-juno.rst1 PSCI Performance Measurements on Arm Juno Development Platform
50 then initiates the test on all CPUs in parallel.
55 executes the test on itself.
80 timestamps, which runs at 50MHz on Juno.
85 ``CPU_SUSPEND`` to deepest power level on all CPUs in parallel
117 ``CPU_SUSPEND`` to power level 0 on all CPUs in parallel
152 ``CPU_SUSPEND`` to deepest power level on all CPUs in sequence
184 ``CPU_SUSPEND`` to power level 0 on all CPUs in sequence
212 on power on (for example, no need to enter CCI coherency)
214 ``CPU_OFF`` on all non-lead CPUs in sequence then ``CPU_SUSPEND`` on lead CPU to deepest power level
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