Home
last modified time | relevance | path

Searched refs:pll_div (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/soc/
A Dsoc.h123 struct pll_div { struct
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/dram/
A Ddfs.c25 static const struct pll_div dpll_rates_table[] = {
1966 static void m0_configure_ddr(struct pll_div pll_div, uint32_t ddr_index) in m0_configure_ddr() argument
1968 mmio_write_32(M0_PARAM_ADDR + PARAM_DPLL_CON0, FBDIV(pll_div.fbdiv)); in m0_configure_ddr()
1970 POSTDIV2(pll_div.postdiv2) | POSTDIV1(pll_div.postdiv1) | in m0_configure_ddr()
1971 REFDIV(pll_div.refdiv)); in m0_configure_ddr()
1973 mmio_write_32(M0_PARAM_ADDR + PARAM_DRAM_FREQ, pll_div.mhz); in m0_configure_ddr()

Completed in 6 milliseconds