Searched refs:pll_idx (Results 1 – 4 of 4) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/apusys/ |
| A D | apupll.c | 138 pll_idx = APUPLL_MAX; in pllidx2name()
141 return names[pll_idx]; in pllidx2name()
345 _pll_pwr(pll_idx, true); in _pll_switch()
349 _pll_en(pll_idx, true); in _pll_switch()
352 _pll_en(pll_idx, false); in _pll_switch()
353 _pll_iso(pll_idx, true); in _pll_switch()
390 switch (pll_idx) { in apu_pll_enable()
429 switch (pll_idx) { in apu_pll_enable()
514 if (pll_idx < 0) { in anpu_pll_set_rate()
515 ret = pll_idx; in anpu_pll_set_rate()
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| A D | apupwr_clkctl.c | 316 int32_t pll_idx; in apupwr_smc_bulk_pll() local
319 for (pll_idx = APUPLL; pll_idx < APUPLL_MAX; pll_idx++) { in apupwr_smc_bulk_pll()
320 ret = apu_pll_enable(pll_idx, enable, false); in apupwr_smc_bulk_pll()
326 for (pll_idx = APUPLL2; pll_idx >= APUPLL; pll_idx--) { in apupwr_smc_bulk_pll()
327 ret = apu_pll_enable(pll_idx, enable, false); in apupwr_smc_bulk_pll()
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| A D | apupwr_clkctl.h | 20 int32_t apu_pll_enable(int32_t pll_idx, bool enable, bool fhctl_en);
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| /arm-trusted-firmware-2.8.0/drivers/st/clk/ |
| A D | clk-stm32mp13.c | 1347 static inline struct stm32_pll_dt_cfg *clk_stm32_pll_get_pdata(int pll_idx) in clk_stm32_pll_get_pdata() argument
1352 return &pdata->pll[pll_idx]; in clk_stm32_pll_get_pdata()
1444 static int _clk_stm32_pll_init(struct stm32_clk_priv *priv, int pll_idx, in _clk_stm32_pll_init() argument
1447 const struct stm32_clk_pll *pll = clk_st32_pll_data(pll_idx); in _clk_stm32_pll_init()
1458 if ((pll_idx == _PLL4) && pll4_bootrom) { in _clk_stm32_pll_init()
1484 static int clk_stm32_pll_init(struct stm32_clk_priv *priv, int pll_idx) in clk_stm32_pll_init() argument
1486 struct stm32_pll_dt_cfg *pll_conf = clk_stm32_pll_get_pdata(pll_idx); in clk_stm32_pll_init()
1489 return _clk_stm32_pll_init(priv, pll_idx, pll_conf); in clk_stm32_pll_init()
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