| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/ddr/ |
| A D | ddr4_dvfs.c | 56 void dram_cfg_all_mr(struct dram_info *info, uint32_t pstate) in dram_cfg_all_mr() argument
67 ddr4_mr_write(j, info->mr_table[pstate][j], 0, i); in dram_cfg_all_mr()
69 ddr4_mr_write(6, info->mr_table[pstate][7], 0, i); in dram_cfg_all_mr()
73 void sw_pstate(uint32_t pstate, uint32_t drate) in sw_pstate() argument
83 mmio_write_32(DDRC_MSTR2(0), pstate); in sw_pstate()
104 mmio_write_32(DDRC_DFIMISC(0), 0x00000000 | (pstate << 8)); in sw_pstate()
105 mmio_write_32(DDRC_DFIMISC(0), 0x00000020 | (pstate << 8)); in sw_pstate()
115 mmio_write_32(DDRC_DFIMISC(0), 0x00000000 | (pstate << 8)); in sw_pstate()
141 uint32_t drate = info->timing_info->fsp_table[pstate]; in ddr4_swffc()
210 sw_pstate(pstate, drate); in ddr4_swffc()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/lib/pm/armv8_2/ |
| A D | pwr_ctrl.c | 245 armv8_2_cpu_pwr_on(&pm_state, pstate); in armv8_2_power_domain_on_finish()
248 nb.pwr_domain = pstate; in armv8_2_power_domain_on_finish()
269 armv8_2_cpu_pwr_off(&pm_state, pstate); in armv8_2_power_domain_off()
272 nb.pwr_domain = pstate; in armv8_2_power_domain_off()
281 unsigned int pstate = 0; in armv8_2_power_domain_suspend() local
308 nb.pwr_domain = pstate; in armv8_2_power_domain_suspend()
311 if (IS_AFFLV_PUBEVENT(pstate)) { in armv8_2_power_domain_suspend()
319 unsigned int pstate = 0; in armv8_2_power_domain_suspend_finish() local
346 nb.pwr_domain = pstate; in armv8_2_power_domain_suspend_finish()
349 if (IS_AFFLV_PUBEVENT(pstate)) { in armv8_2_power_domain_suspend_finish()
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| /arm-trusted-firmware-2.8.0/include/drivers/arm/ |
| A D | ccn.h | 41 #define CCN_GET_RETENTION_STATE(pstate) ((pstate >> 4) & 0x3) argument
47 #define CCN_GET_RUN_STATE(pstate) (pstate & 0xf) argument
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| /arm-trusted-firmware-2.8.0/plat/mediatek/drivers/cpu_pm/cpcv3_2/ |
| A D | mt_cpu_pm.c | 204 unsigned int pstate = MT_CPUPM_PWR_DOMAIN_CORE; in cpupm_do_pstate_off() local
246 pstate |= MT_CPUPM_PWR_DOMAIN_CLUSTER; in cpupm_do_pstate_off()
250 pstate |= MT_CPUPM_PWR_DOMAIN_PERCORE_DSU; in cpupm_do_pstate_off()
253 return pstate; in cpupm_do_pstate_off()
259 unsigned int pstate = MT_CPUPM_PWR_DOMAIN_CORE; in cpupm_do_pstate_on() local
276 pstate |= MT_CPUPM_PWR_DOMAIN_CLUSTER; in cpupm_do_pstate_on()
317 pstate |= MT_CPUPM_PWR_DOMAIN_PERCORE_DSU; in cpupm_do_pstate_on()
319 return pstate; in cpupm_do_pstate_on()
341 unsigned int pstate = 0; in cpupm_get_pstate() local
348 pstate = MT_CPUPM_PWR_DOMAIN_CORE; in cpupm_get_pstate()
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| /arm-trusted-firmware-2.8.0/plat/arm/common/ |
| A D | arm_pm.c | 27 unsigned int pstate = psci_get_pstate_type(power_state); in arm_validate_power_state() local
37 if (pstate == PSTATE_TYPE_STANDBY) { in arm_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/st/stm32mp1/ |
| A D | stm32mp1_pm.c | 164 int pstate = psci_get_pstate_type(power_state); in stm32_validate_power_state() local
166 if (pstate != 0) { in stm32_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/ |
| A D | plat_pm.c | 114 int pstate = psci_get_pstate_type(power_state); in poplar_validate_power_state() local
119 if (pstate == PSTATE_TYPE_STANDBY) in poplar_validate_power_state()
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| /arm-trusted-firmware-2.8.0/drivers/arm/ccn/ |
| A D | ccn_private.h | 161 #define PSTATE_TO_RUN_MODE(pstate) (((pstate) & HNF_PSTATE_MASK) >> 2) argument
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal/ |
| A D | plat_psci.c | 196 uint32_t pstate = psci_get_pstate_type(power_state); in versal_validate_power_state() local
201 if (pstate == PSTATE_TYPE_STANDBY) { in versal_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/include/ |
| A D | dram.h | 76 void ddr4_swffc(struct dram_info *dram_info, unsigned int pstate);
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| /arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/ |
| A D | plat_psci.c | 179 uint32_t pstate = psci_get_pstate_type(power_state); in zynqmp_validate_power_state() local
184 if (pstate == PSTATE_TYPE_STANDBY) { in zynqmp_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal_net/ |
| A D | plat_psci_pm.c | 198 int32_t pstate = psci_get_pstate_type(power_state); in versal_net_validate_power_state() local
203 if (pstate == PSTATE_TYPE_STANDBY) { in versal_net_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/ |
| A D | hikey_pm.c | 217 int pstate = psci_get_pstate_type(power_state); in hikey_validate_power_state() local
227 if (pstate == PSTATE_TYPE_STANDBY) { in hikey_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/src/ |
| A D | brcm_pm_ops.c | 347 int pstate = psci_get_pstate_type(power_state); in brcm_validate_power_state() local
357 if (pstate == PSTATE_TYPE_STANDBY) { in brcm_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/ |
| A D | hikey960_pm.c | 141 unsigned int pstate = psci_get_pstate_type(power_state); in hikey960_validate_power_state() local
151 if (pstate == PSTATE_TYPE_STANDBY) { in hikey960_validate_power_state()
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| /arm-trusted-firmware-2.8.0/include/lib/psci/ |
| A D | psci.h | 110 #define psci_get_pstate_pwrlvl(pstate) (((pstate) >> PSTATE_PWR_LVL_SHIFT) & \ argument
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| /arm-trusted-firmware-2.8.0/plat/renesas/common/ |
| A D | plat_pm.c | 255 unsigned int pstate = psci_get_pstate_type(power_state); in rcar_validate_power_state() local
258 if (pstate == PSTATE_TYPE_STANDBY) { in rcar_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/rockchip/common/ |
| A D | plat_pm.c | 135 int pstate = psci_get_pstate_type(power_state); in rockchip_validate_power_state() local
145 if (pstate == PSTATE_TYPE_STANDBY) { in rockchip_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/ |
| A D | plat_pm.c | 298 unsigned int pstate = psci_get_pstate_type(power_state); in plat_validate_power_state() local
302 if (pstate == PSTATE_TYPE_STANDBY) { in plat_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/ |
| A D | plat_pm.c | 296 unsigned int pstate = psci_get_pstate_type(power_state); in plat_validate_power_state() local
304 if (pstate == PSTATE_TYPE_STANDBY) { in plat_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/ |
| A D | plat_pm.c | 293 unsigned int pstate = psci_get_pstate_type(power_state); in plat_validate_power_state() local
301 if (pstate == PSTATE_TYPE_STANDBY) { in plat_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8173/ |
| A D | plat_pm.c | 472 int pstate = psci_get_pstate_type(power_state); in plat_validate_power_state() local
482 if (pstate == PSTATE_TYPE_STANDBY) { in plat_validate_power_state()
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| /arm-trusted-firmware-2.8.0/drivers/nxp/ddr/phy-gen2/ |
| A D | phy.c | 34 #define MAP_PHY_ADDR(pstate, n, instance, offset, c) \ argument
35 ((((pstate * n) + instance + c) << 12) + offset)
47 return MAP_PHY_ADDR(pstate, 12, instance, offset, 0); in map_phy_addr_space()
51 return MAP_PHY_ADDR(pstate, 1, 0, offset, 0x58); in map_phy_addr_space()
53 return MAP_PHY_ADDR(pstate, 1, 0, offset, 0x5c); in map_phy_addr_space()
55 return MAP_PHY_ADDR(pstate, 0, instance, offset, 0x60); in map_phy_addr_space()
57 return MAP_PHY_ADDR(pstate, 0, 0, offset, 0x68); in map_phy_addr_space()
59 return MAP_PHY_ADDR(pstate, 1, 0, offset, 0x69); in map_phy_addr_space()
61 return MAP_PHY_ADDR(pstate, 0, 0, offset, 0x6d); in map_phy_addr_space()
63 return MAP_PHY_ADDR(pstate, 0, 0, offset, 0x6e); in map_phy_addr_space()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/ |
| A D | plat_pm.c | 484 int pstate = psci_get_pstate_type(power_state); in plat_mtk_validate_power_state() local
494 if (pstate == PSTATE_TYPE_STANDBY) { in plat_mtk_validate_power_state()
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/common/ |
| A D | plat_pm.c | 346 int pstate = psci_get_pstate_type(power_state); in a8k_validate_power_state() local
354 if (pstate == PSTATE_TYPE_STANDBY) { in a8k_validate_power_state()
|