| /arm-trusted-firmware-2.8.0/lib/compiler-rt/builtins/arm/ |
| A D | aeabi_ldivmod.S | 25 push {r6, lr}
27 add r6, sp, #8
28 str r6, [sp]
30 movs r6, r0
32 movs r2, r6
33 movs r6, r1
35 movs r3, r6
41 pop {r6, pc}
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| A D | aeabi_uldivmod.S | 25 push {r6, lr}
27 add r6, sp, #8
28 str r6, [sp]
30 movs r6, r0
32 movs r2, r6
33 movs r6, r1
35 movs r3, r6
41 pop {r6, pc}
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| /arm-trusted-firmware-2.8.0/plat/allwinner/common/ |
| A D | arisc_off.S | 61 l.or r5, r5, r6 # set bit to ...
65 l.xori r6, r6, -1 # negate core mask
66 l.and r5, r5, r6 # clear bit to ...
69 l.ff1 r6, r3 # get core number from high mask
70 l.addi r6, r6, -17 # convert to 0-3
71 l.slli r6, r6, 2 # r5: core number*4 (0-12)
72 l.add r6, r6, r13 # add to base address
74 l.sw 0x1540(r6), r5 # core power switch registers
92 l.srli r6, r3, 16 # move mask to lower 16 bits(ds)
93 l.sfeqi r6, 1 # core 0 is special
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| /arm-trusted-firmware-2.8.0/common/aarch32/ |
| A D | debug.S | 47 mov r6, #10 /* Divide by 10 after every loop iteration */
54 udiv r5, r5, r6 /* Reduce divisor */
77 mov r6, r1
96 tst r6, r4
98 mov r4, r6
171 sub r6, lr, #4
185 mov r4, r6
195 mov lr, r6
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| /arm-trusted-firmware-2.8.0/bl1/aarch32/ |
| A D | bl1_exceptions.S | 102 mov r6, sp
103 ldr sp, [r6, #SMC_CTX_SP_MON]
105 ldr r0, [r6, #SMC_CTX_SCR]
125 mov r0, r6
137 ldr r0, [r6, #SMC_CTX_GPREG_R0] /* smc_fid */
139 mov r2, r6 /* handle */
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| /arm-trusted-firmware-2.8.0/drivers/renesas/common/ddr/ddr_a/ |
| A D | ddr_init_d3.c | 26 uint32_t i, r2, r3, r5, r6, r7, r12; in init_ddr_d3_1866() local
163 mmio_write_32(DBSC_DBPDRGD_0, r6); in init_ddr_d3_1866()
165 mmio_write_32(DBSC_DBPDRGD_0, r6); in init_ddr_d3_1866()
167 mmio_write_32(DBSC_DBPDRGD_0, r6); in init_ddr_d3_1866()
169 mmio_write_32(DBSC_DBPDRGD_0, r6); in init_ddr_d3_1866()
192 if (r6 > 0) { in init_ddr_d3_1866()
267 if (r12 < r6) { in init_ddr_d3_1866()
287 ((r6 + r5 + in init_ddr_d3_1866()
538 if (r6 > 0) { in init_ddr_d3_1600()
613 if (r12 < r6) { in init_ddr_d3_1600()
[all …]
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| A D | ddr_init_v3m.c | 17 uint32_t i, r2, r5, r6, r7, r12; in init_ddr_v3m_1600() local
197 r6 = mmio_read_32(DBSC_DBPDRGD_0) & 0xFF; in init_ddr_v3m_1600()
201 if (r6 > 0) { in init_ddr_v3m_1600()
210 mmio_write_32(DBSC_DBPDRGD_0, r2 | r6); in init_ddr_v3m_1600()
221 (((r5 << 1) + r6) & 0xFF)); in init_ddr_v3m_1600()
269 r6 = (mmio_read_32(DBSC_DBPDRGD_0) & 0xFF); in init_ddr_v3m_1600()
274 if (r6 - r12 > 0) { in init_ddr_v3m_1600()
284 mmio_write_32(DBSC_DBPDRGD_0, ((r6 - r12) & 0xFF) | r2); in init_ddr_v3m_1600()
294 ((r6 + r5 + in init_ddr_v3m_1600()
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| A D | ddr_init_e3.c | 37 uint32_t i, r2, r5, r6, r7, r12; in init_ddr() local
380 r6 = mmio_read_32(DBSC_DBPDRGD_0) & 0xFF; in init_ddr()
384 if (r6 > 0) { in init_ddr()
392 mmio_write_32(DBSC_DBPDRGD_0, r2 | r6); in init_ddr()
402 ((r6 + ((r5) << 1)) & in init_ddr()
573 r6 = mmio_read_32(DBSC_DBPDRGD_0) & 0xFF; in init_ddr()
577 if (r12 < r6) { in init_ddr()
839 uint32_t r2, r5, r6, r7, r12, i; in recovery_from_backup_mode() local
1256 if (r6 > 0) { in recovery_from_backup_mode()
1264 mmio_write_32(DBSC_DBPDRGD_0, r2 | r6); in recovery_from_backup_mode()
[all …]
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| /arm-trusted-firmware-2.8.0/plat/rockchip/common/aarch32/ |
| A D | plat_helpers.S | 100 and r6, r0, #PLAT_RK_MPIDR_CLUSTER_MASK
102 and r6, r0, #MPIDR_CLUSTER_MASK
104 mov r0, r6
112 add r7, r5, r6, LSR #PLAT_RK_CLST_TO_CPUID_SHIFT
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| /arm-trusted-firmware-2.8.0/lib/aarch32/ |
| A D | misc_helpers.S | 30 ldm sp, {r4, r5, r6}
218 mov r6, r0
235 subs r0, r2, r6 /* Diff(S) = Current Address - Compiled Address */
252 cmp r3, r6
301 cmp r4, r6
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| A D | cache_helpers.S | 97 add r6, r11, r0, lsl #3 // cache op is 2x32-bit instructions
133 blx r6
146 mov r6, #0
147 stcopr r6, CSSELR //select cache level 0 in csselr
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| /arm-trusted-firmware-2.8.0/lib/cpus/aarch32/ |
| A D | cpu_helpers.S | 95 push {r4 - r6, lr}
97 mov r6, r0
106 str r0, [r6, #CPU_DATA_CPU_OPS_PTR]!
108 pop {r4 - r6, pc}
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| /arm-trusted-firmware-2.8.0/include/arch/aarch32/ |
| A D | smccc_macros.S | 65 mrs r6, spsr_irq
76 mrs r6, spsr_abt
207 msr spsr_irq, r6
218 msr spsr_abt, r6
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| A D | smccc_helpers.h | 45 u_register_t r6; member
142 ((smc_ctx_t *)(_h))->r6 = (_r6); \
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| A D | arch_helpers.h | 210 uint32_t r4, uint32_t r5, uint32_t r6, uint32_t r7);
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| /arm-trusted-firmware-2.8.0/include/arch/aarch64/ |
| A D | smccc_helpers.h | 122 register uint64_t r6 __asm__("x6") = arg5; in smc_helper()
128 "+r"(r5), "+r"(r6), "+r"(r7)); in smc_helper()
136 ret_args._regs[6] = r6; in smc_helper()
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| /arm-trusted-firmware-2.8.0/bl32/sp_min/aarch32/ |
| A D | entrypoint.S | 201 mov r6, r2
213 mov r2, r6
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| /arm-trusted-firmware-2.8.0/plat/st/stm32mp1/ |
| A D | stm32mp1_helper.S | 64 mov r4, r6
310 mov lr, r6
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| /arm-trusted-firmware-2.8.0/services/spd/trusty/ |
| A D | trusty.c | 67 uint64_t r6; member
107 args.r6 = 0; in trusty_context_switch()
260 ret.r4, ret.r5, ret.r6, ret.r7); in trusty_smc_handler()
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| /arm-trusted-firmware-2.8.0/include/drivers/brcm/emmc/ |
| A D | emmc_csl_sdcmd.h | 89 struct sd_r6_resp r6; member
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| /arm-trusted-firmware-2.8.0/drivers/brcm/emmc/ |
| A D | emmc_csl_sdcard.c | 874 resp->data.r6.rca = rca; in process_cmd_response()
875 resp->data.r6.cardStatus = cardStatus & 0xFFFF; in process_cmd_response()
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| /arm-trusted-firmware-2.8.0/docs/getting_started/ |
| A D | rt-svc-writers-guide.rst | 274 SMC_RET7(handle, r0, r1, r2, r3, r4, r5, r6);
275 SMC_RET8(handle, r0, r1, r2, r3, r4, r5, r6, r7);
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