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Searched refs:region (Results 1 – 25 of 58) sorted by relevance

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/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/emi_mpu/
A Demi_mpu_common.c26 unsigned int region; in _emi_mpu_set_protection() local
28 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
39 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
45 region_lock_state[region] = 1; in _emi_mpu_set_protection()
61 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
62 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
75 int region, i; in dump_emi_mpu_regions() local
78 for (region = 0; region < 8; ++region) { in dump_emi_mpu_regions()
79 INFO("region %d:\n", region); in dump_emi_mpu_regions()
81 mmio_read_32(EMI_MPU_SA(region)), mmio_read_32(EMI_MPU_EA(region))); in dump_emi_mpu_regions()
[all …]
/arm-trusted-firmware-2.8.0/plat/nxp/common/setup/
A Dls_common.c69 + info_dram_regions->region[i].size in mmap_add_ddr_regions_statically()
72 info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
73 info_dram_regions->region[i].size, in mmap_add_ddr_regions_statically()
83 + info_dram_regions->region[i].size in mmap_add_ddr_regions_statically()
89 (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
102 + info_dram_regions->region[i].size in mmap_add_ddr_regions_statically()
105 info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
106 info_dram_regions->region[i].size, in mmap_add_ddr_regions_statically()
126 info_dram_regions->region[i].addr, in mmap_add_ddr_region_dynamically()
127 info_dram_regions->region[i].size, in mmap_add_ddr_region_dynamically()
[all …]
A Dls_bl2_el3_setup.c42 dram_regions_info.region[reg_id].addr = NXP_DRAM0_ADDR; in populate_dram_regions_info()
43 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
51 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
55 assert(dram_regions_info.region[reg_id].size > 0); in populate_dram_regions_info()
64 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
65 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
68 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
74 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
75 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
202 if ((dram_regions_info.region[0].addr == 0) in ls_bl2_el3_plat_arch_setup()
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A Dls_bl31_setup.c99 dram_regions_info.region[0].addr = 0x80000000; in bl31_early_platform_setup2()
100 dram_regions_info.region[0].size = 0x80000000; in bl31_early_platform_setup2()
101 dram_regions_info.region[1].addr = 0x880000000; in bl31_early_platform_setup2()
102 dram_regions_info.region[1].size = 0x80000000; in bl31_early_platform_setup2()
136 dram_regions_info.region[i].addr = in bl31_early_platform_setup2()
137 loc_dram_regions_info->region[i].addr; in bl31_early_platform_setup2()
138 dram_regions_info.region[i].size = in bl31_early_platform_setup2()
139 loc_dram_regions_info->region[i].size; in bl31_early_platform_setup2()
141 dram_regions_info.region[i].size); in bl31_early_platform_setup2()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/emi_mpu/
A Demi_mpu.c25 unsigned int region; in _emi_mpu_set_protection() local
27 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
38 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
44 region_lock_state[region] = 1; in _emi_mpu_set_protection()
83 (region_info->region << 24); in emi_mpu_set_protection()
98 int region, i; in dump_emi_mpu_regions() local
101 for (region = 0; region < 8; ++region) { in dump_emi_mpu_regions()
107 INFO("region %d:\n", region); in dump_emi_mpu_regions()
120 region_info.region = 2; in emi_mpu_init()
131 region_info.region = 3; in emi_mpu_init()
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A Demi_mpu.h18 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
19 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
21 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
33 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
34 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
36 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
92 unsigned int region; member
/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/emi_mpu/mt8188/
A Demi_mpu_priv.h16 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
17 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
19 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
29 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
30 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
32 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/emi_mpu/
A Demi_mpu.c23 unsigned int region; in _emi_mpu_set_protection() local
25 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
47 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
57 int region, i; in dump_emi_mpu_regions() local
60 for (region = 0; region < 8; ++region) { in dump_emi_mpu_regions()
66 WARN("region %d:\n", region); in dump_emi_mpu_regions()
81 (region_info->region << 24); in emi_mpu_set_protection()
101 region_info.region = 1; in emi_mpu_init()
112 region_info.region = 2; in emi_mpu_init()
123 region_info.region = 3; in emi_mpu_init()
[all …]
A Demi_mpu.h43 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region) * 4) argument
44 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region) * 4) argument
47 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region) * 4 + \ argument
94 unsigned int region; member
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/emi_mpu/
A Demi_mpu.c25 unsigned int region; in _emi_mpu_set_protection() local
27 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
38 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
44 region_lock_state[region] = 1; in _emi_mpu_set_protection()
60 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
61 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
66 mmio_write_32(SUB_EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
83 (region_info->region << 24); in emi_mpu_set_protection()
104 region_info.region = 2; in emi_mpu_init()
115 region_info.region = 3; in emi_mpu_init()
[all …]
A Demi_mpu.h18 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
19 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
21 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
33 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
34 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
36 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
92 unsigned int region; member
/arm-trusted-firmware-2.8.0/drivers/arm/tzc/
A Dtzc380.c32 static void tzc380_write_region_base_low(uintptr_t base, unsigned int region, in tzc380_write_region_base_low() argument
35 mmio_write_32(base + REGION_SETUP_LOW_OFF(region), val); in tzc380_write_region_base_low()
38 static void tzc380_write_region_base_high(uintptr_t base, unsigned int region, in tzc380_write_region_base_high() argument
41 mmio_write_32(base + REGION_SETUP_HIGH_OFF(region), val); in tzc380_write_region_base_high()
44 static void tzc380_write_region_attributes(uintptr_t base, unsigned int region, in tzc380_write_region_attributes() argument
47 mmio_write_32(base + REGION_ATTRIBUTES_OFF(region), val); in tzc380_write_region_attributes()
83 void tzc380_configure_region(uint8_t region, uintptr_t region_base, unsigned int attr) in tzc380_configure_region() argument
87 assert(region < tzc380.num_regions); in tzc380_configure_region()
89 tzc380_write_region_base_low(tzc380.base, region, addr_low(region_base)); in tzc380_configure_region()
90 tzc380_write_region_base_high(tzc380.base, region, addr_high(region_base)); in tzc380_configure_region()
[all …]
A Dtzc400.c241 unsigned int region, in tzc400_configure_region() argument
256 (region < tzc400.num_regions)); in tzc400_configure_region()
270 _tzc400_configure_region(tzc400.base, filters, region, region_base, in tzc400_configure_region()
275 void tzc400_update_filters(unsigned int region, unsigned int filters) in tzc400_update_filters() argument
279 (region < tzc400.num_regions)); in tzc400_update_filters()
281 _tzc400_update_filters(tzc400.base, region, tzc400.num_filters, filters); in tzc400_update_filters()
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/
A Dhikey_security.c51 static volatile struct rgn_map_reg *get_rgn_map_reg(uint32_t base, int region, int port) in get_rgn_map_reg() argument
53 uint64_t addr = base + 0x100 + 0x10 * region + 0x400 * (uint64_t)port; in get_rgn_map_reg()
57 static volatile struct rgn_attr_reg *get_rgn_attr_reg(uint32_t base, int region, in get_rgn_attr_reg() argument
60 uint64_t addr = base + 0x104 + 0x10 * region + 0x400 * (uint64_t)port; in get_rgn_attr_reg()
70 int region) in sec_protect() argument
78 assert(region > 0 && region < 16); in sec_protect()
91 rgn_map = get_rgn_map_reg(MDDRC_SECURITY_BASE, region, i); in sec_protect()
92 rgn_attr = get_rgn_attr_reg(MDDRC_SECURITY_BASE, region, i); in sec_protect()
/arm-trusted-firmware-2.8.0/drivers/arm/css/sds/
A Dsds_private.h88 #define IS_SDS_REGION_VALID(region) \ argument
89 (((((region_desc_t *)(region))->reg[0]) & SDS_REGION_SIGNATURE_MASK) == SDS_REGION_SIGNATURE)
90 #define GET_SDS_REGION_STRUCTURE_COUNT(region) \ argument
91 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_STRUCT_COUNT_SHIFT)\
93 #define GET_SDS_REGION_SCHEMA_VERSION(region) \ argument
94 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_SCH_MINOR_SHIFT)\
96 #define GET_SDS_REGION_SIZE(region) ((((region_desc_t *)(region))->reg[1])) argument
/arm-trusted-firmware-2.8.0/services/std_svc/drtm/
A Ddrtm_res_address_map.c43 map->region[i].region_address = mmap[i].base_pa; in drtm_build_address_map()
46 map->region[i].region_size_type = 0; in drtm_build_address_map()
48 map->region[i].region_size_type, in drtm_build_address_map()
55 map->region[i].region_size_type, in drtm_build_address_map()
60 map->region[i].region_size_type, in drtm_build_address_map()
63 map->region[i].region_size_type, in drtm_build_address_map()
68 map->region[i].region_size_type, in drtm_build_address_map()
/arm-trusted-firmware-2.8.0/include/drivers/arm/
A Dtzc400.h107 unsigned int region,
112 void tzc400_update_filters(unsigned int region, unsigned int filters);
132 unsigned int region, in tzc_configure_region() argument
138 tzc400_configure_region(filters, region, region_base, in tzc_configure_region()
A Dtzc380.h143 void tzc380_configure_region(uint8_t region,
152 static inline void tzc_configure_region(uint8_t region, in tzc_configure_region() argument
156 tzc380_configure_region(region, region_base, attr); in tzc_configure_region()
/arm-trusted-firmware-2.8.0/docs/plat/
A Dxilinx-versal-net.rst21 * `VERSAL_NET_ATF_MEM_SIZE`: Specifies the size of the memory region of the bl31 binary.
23 * `VERSAL_NET_BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary.
/arm-trusted-firmware-2.8.0/drivers/io/
A Dio_block.c131 io_block_spec_t *region; in block_open() local
137 region = (io_block_spec_t *)spec; in block_open()
139 assert(((region->offset % cur->dev_spec->block_size) == 0) && in block_open()
140 ((region->length % cur->dev_spec->block_size) == 0)); in block_open()
142 cur->base = region->offset; in block_open()
143 cur->size = region->length; in block_open()
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/drivers/emi_mpu/
A Demi_mpu.c26 int region, in emi_mpu_set_region_protection() argument
50 switch (region) { in emi_mpu_set_region_protection()
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1046a/
A Dsoc.c275 if (info_dram_regions->region[dram_idx].size == 0) { in soc_mem_access()
283 info_dram_regions->region[dram_idx].addr, in soc_mem_access()
284 info_dram_regions->region[dram_idx].size, in soc_mem_access()
/arm-trusted-firmware-2.8.0/docs/components/
A Dgranule-protection-tables-design.rst47 PAS region is configured. The first step is the level 0 table, each entry in the
48 level 0 table controls access to a relatively large region in memory (block
49 descriptor), and the entire region can belong to a single PAS when a one step
83 region definitions in the file ``include/plat/arm/common/arm_pas_def.h``. Table
97 #. The region size
98 #. The desired attributes of this memory region (mapping type, PAS type)
109 compatibility issues. These macros take the base physical address, region size,
111 imply, ``GPT_MAP_REGION_BLOCK`` creates a region using only L0 mapping while
112 ``GPT_MAP_REGION_GRANULE`` creates a region using L0 and L1 mappings.
148 #. DDR discovery and initialization by the system, the discovered DDR region(s)
[all …]
A Dxlat-tables-lib-v2-design.rst62 An ``mmap_region`` is an abstract, concise way to represent a memory region to
81 a User region (EL0) or Privileged region (EL1). See the ``MT_xxx`` definitions
86 the region. For example, assuming the MMU has been configured to use a 4KB
107 The region's granularity is an optional field; if it is not specified the
270 Nonetheless, these APIs will check upfront whether the region can be
273 the new region will overlap another one in an invalid way, or if any other
277 without adding the offending memory region.
365 favour mapping a region using the biggest possible blocks, only creating a
389 order of all regions at all times. As each new region is mapped, existing
401 For example, when the user requests removing a dynamic region, the library
[all …]
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1088a/
A Dsoc.c208 if (info_dram_regions->region[i].size == 0) { in soc_mem_access()
216 info_dram_regions->region[dram_idx].addr, in soc_mem_access()
217 info_dram_regions->region[dram_idx].size, in soc_mem_access()

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