/arm-trusted-firmware-2.8.0/drivers/brcm/emmc/ |
A D | emmc_csl_sdcmd.c | 21 int res; in sd_cmd0() local 32 return res; in sd_cmd0() 37 int res; in sd_cmd1() local 54 return res; in sd_cmd1() 70 int res; in sd_cmd3() local 94 int res; in sd_cmd7() local 152 int res; in sd_cmd9() local 246 int res; in sd_cmd13() local 268 int res; in sd_cmd16() local 315 int res; in sd_cmd17() local [all …]
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/arm-trusted-firmware-2.8.0/plat/mediatek/common/lpm/ |
A D | mt_lp_rm.c | 60 int i, res = MT_RM_STATUS_BAD; in mt_lp_rm_find_and_run_constraint() local 65 return res; in mt_lp_rm_find_and_run_constraint() 71 if (res != 0) { in mt_lp_rm_find_and_run_constraint() 72 return res; in mt_lp_rm_find_and_run_constraint() 81 res = i; in mt_lp_rm_find_and_run_constraint() 87 return res; in mt_lp_rm_find_and_run_constraint() 92 int res = MT_RM_STATUS_BAD; in mt_lp_rm_do_update() local 97 return res; in mt_lp_rm_do_update() 102 res = (*rc)->update(stateid, type, p); in mt_lp_rm_do_update() 103 if (res != MT_RM_STATUS_OK) { in mt_lp_rm_do_update() [all …]
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/ |
A D | mt_spm_cond.c | 105 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument 115 if (res != NULL) { in mt_spm_cond_check() 116 res->table_cg[i] = in mt_spm_cond_check() 122 res->table_cg[i]); in mt_spm_cond_check() 125 if (res->table_cg[i] != 0U) { in mt_spm_cond_check() 134 if (res != NULL) { in mt_spm_cond_check() 135 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check() 137 if (res->table_pll != 0U) { in mt_spm_cond_check() 139 (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check() 161 int res; in mt_spm_cond_update() local [all …]
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A D | mt_spm_conservation.c | 126 int spm_conservation_get_result(struct wake_status **res) in spm_conservation_get_result() argument 128 if (res == NULL) { in spm_conservation_get_result() 132 *res = &spm_wakesta; in spm_conservation_get_result()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/ |
A D | mt_spm_cond.c | 101 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument 111 if (res != NULL) { in mt_spm_cond_check() 113 if (is_system_suspend && ((res->table_cg[i]) != 0U)) { in mt_spm_cond_check() 116 res->table_cg[i]); in mt_spm_cond_check() 119 if ((res->table_cg[i]) != 0U) { in mt_spm_cond_check() 128 if (res != NULL) { in mt_spm_cond_check() 129 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check() 131 if (res->table_pll != 0U) { in mt_spm_cond_check() 153 int res; in mt_spm_cond_update() local 204 res = (*rc)->update(stateid, PLAT_RC_UPDATE_CONDITION, in mt_spm_cond_update() [all …]
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A D | mt_spm_conservation.c | 137 int spm_conservation_get_result(struct wake_status **res) in spm_conservation_get_result() argument 141 if (res == NULL) { in spm_conservation_get_result() 144 *res = &spm_wakesta; in spm_conservation_get_result()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/ |
A D | mt_spm_cond.c | 122 struct mt_spm_cond_tables *res) in mt_spm_cond_check() argument 132 if (res != NULL) { in mt_spm_cond_check() 133 res->table_cg[i] = in mt_spm_cond_check() 139 res->table_cg[i]); in mt_spm_cond_check() 142 if (res->table_cg[i] != 0U) { in mt_spm_cond_check() 151 if (res != NULL) { in mt_spm_cond_check() 152 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check() 154 if (res->table_pll != 0U) { in mt_spm_cond_check() 156 (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check() 177 int res; in mt_spm_cond_update() local [all …]
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A D | mt_spm_conservation.c | 126 int spm_conservation_get_result(struct wake_status **res) in spm_conservation_get_result() argument 128 if (res == NULL) { in spm_conservation_get_result() 132 *res = &spm_wakesta; in spm_conservation_get_result()
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/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/cpu_pm/cpcv3_2/ |
A D | mt_cpu_pm_cpc.c | 184 unsigned int res = 0; in mtk_cpc_read_config() local 188 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? 1 : 0; in mtk_cpc_read_config() 191 res = cpc.auto_off; in mtk_cpc_read_config() 194 res = TICKS_TO_US(cpc.auto_thres_tick); in mtk_cpc_read_config() 201 return res; in mtk_cpc_read_config() 206 uint64_t res = 0; in mtk_cpc_handler() local 213 res = mtk_cpc_read_config((unsigned int)arg1); in mtk_cpc_handler() 221 return res; in mtk_cpc_handler()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/mcdi/ |
A D | mt_cpu_pm_cpc.c | 207 uint32_t res = 0U; in mtk_cpc_read_config() local 211 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? in mtk_cpc_read_config() 215 res = cpc.auto_off; in mtk_cpc_read_config() 218 res = ticks_to_us(cpc.auto_thres_tick); in mtk_cpc_read_config() 226 return res; in mtk_cpc_read_config() 231 uint64_t res = 0ULL; in mtk_cpc_handler() local 244 res = mtk_cpc_read_config((uint32_t)arg1); in mtk_cpc_handler() 250 return res; in mtk_cpc_handler()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/mcdi/ |
A D | mt_cpu_pm_cpc.c | 207 uint32_t res = 0U; in mtk_cpc_read_config() local 211 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? in mtk_cpc_read_config() 215 res = cpc.auto_off; in mtk_cpc_read_config() 218 res = ticks_to_us(cpc.auto_thres_tick); in mtk_cpc_read_config() 226 return res; in mtk_cpc_read_config() 231 uint64_t res = 0ULL; in mtk_cpc_handler() local 244 res = mtk_cpc_read_config((uint32_t)arg1); in mtk_cpc_handler() 250 return res; in mtk_cpc_handler()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/mcdi/ |
A D | mt_cpu_pm_cpc.c | 207 uint32_t res = 0U; in mtk_cpc_read_config() local 211 res = (mmio_read_32(CPC_MCUSYS_CPC_DBG_SETTING) & CPC_PROF_EN) ? in mtk_cpc_read_config() 215 res = cpc.auto_off; in mtk_cpc_read_config() 218 res = ticks_to_us(cpc.auto_thres_tick); in mtk_cpc_read_config() 226 return res; in mtk_cpc_read_config() 231 uint64_t res = 0ULL; in mtk_cpc_handler() local 244 res = mtk_cpc_read_config((uint32_t)arg1); in mtk_cpc_handler() 250 return res; in mtk_cpc_handler()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/constraints/ |
A D | mt_spm_rc_bus26m.c | 114 int res = 0; in do_irqs_delivery() local 118 res = spm_conservation_get_result(&wakeup); in do_irqs_delivery() 120 if ((res != 0) && (irqs == NULL)) { in do_irqs_delivery() 156 int res = MT_RM_STATUS_OK; in spm_update_rc_bus26m() local 159 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m() 173 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m() 177 return res; in spm_update_rc_bus26m()
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A D | mt_spm_rc_dram.c | 96 int res = MT_RM_STATUS_OK; in spm_update_rc_dram() local 99 res = MT_RM_STATUS_BAD; in spm_update_rc_dram() 110 res = MT_RM_STATUS_BAD; in spm_update_rc_dram() 114 return res; in spm_update_rc_dram()
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A D | mt_spm_rc_syspll.c | 102 int res = MT_RM_STATUS_OK; in spm_update_rc_syspll() local 105 res = MT_RM_STATUS_BAD; in spm_update_rc_syspll() 117 res = MT_RM_STATUS_BAD; in spm_update_rc_syspll() 121 return res; in spm_update_rc_syspll()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/constraints/ |
A D | mt_spm_rc_bus26m.c | 121 int res = 0; in do_irqs_delivery() local 125 res = spm_conservation_get_result(&wakeup); in do_irqs_delivery() 127 if ((res != 0) && (irqs == NULL)) { in do_irqs_delivery() 165 int res = MT_RM_STATUS_OK; in spm_update_rc_bus26m() local 183 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m() 186 return res; in spm_update_rc_bus26m()
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A D | mt_spm_rc_dram.c | 105 int res = MT_RM_STATUS_OK; in spm_update_rc_dram() local 120 res = MT_RM_STATUS_BAD; in spm_update_rc_dram() 123 return res; in spm_update_rc_dram()
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A D | mt_spm_rc_syspll.c | 103 int res = MT_RM_STATUS_OK; in spm_update_rc_syspll() local 119 res = MT_RM_STATUS_BAD; in spm_update_rc_syspll() 122 return res; in spm_update_rc_syspll()
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/constraints/ |
A D | mt_spm_rc_bus26m.c | 111 int res = 0; in do_irqs_delivery() local 115 res = spm_conservation_get_result(&wakeup); in do_irqs_delivery() 117 if ((res != 0) && (irqs == NULL)) { in do_irqs_delivery() 155 int res = MT_RM_STATUS_OK; in spm_update_rc_bus26m() local 173 res = MT_RM_STATUS_BAD; in spm_update_rc_bus26m() 176 return res; in spm_update_rc_bus26m()
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A D | mt_spm_rc_dram.c | 96 int res = MT_RM_STATUS_OK; in spm_update_rc_dram() local 111 res = MT_RM_STATUS_BAD; in spm_update_rc_dram() 114 return res; in spm_update_rc_dram()
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A D | mt_spm_rc_syspll.c | 95 int res = MT_RM_STATUS_OK; in spm_update_rc_syspll() local 111 res = MT_RM_STATUS_BAD; in spm_update_rc_syspll() 114 return res; in spm_update_rc_syspll()
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/arm-trusted-firmware-2.8.0/plat/common/ |
A D | plat_psci_common.c | 47 u_register_t res; in PMF_DECLARE_GET_TIMESTAMP() local 57 res = MAX_TS - pwrdnts + pwrupts; in PMF_DECLARE_GET_TIMESTAMP() 59 res = pwrupts - pwrdnts; in PMF_DECLARE_GET_TIMESTAMP() 61 return res / residency_div; in PMF_DECLARE_GET_TIMESTAMP()
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/arm-trusted-firmware-2.8.0/include/drivers/nxp/crypto/caam/ |
A D | sec_hw_specific.h | 294 uint32_t res:28; member 299 uint32_t res:11; member 307 uint32_t res:11; member 314 uint32_t res:11; member 320 uint32_t res:17; member 327 uint32_t res:11; member
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/arm-trusted-firmware-2.8.0/plat/st/common/ |
A D | stm32mp_trusted_boot.c | 150 int res; in plat_get_rotpk_info() local 155 res = get_rotpk_hash(cookie, root_pk_hash + start_copy_idx, in plat_get_rotpk_info() 157 if (res < 0) { in plat_get_rotpk_info() 165 if ((res == 0) && !stm32mp_is_closed_device()) { in plat_get_rotpk_info()
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/arm-trusted-firmware-2.8.0/plat/intel/soc/common/soc/ |
A D | socfpga_mailbox.c | 582 uint32_t res, response[6]; in intel_mailbox_get_config_status() local 592 res = response[RECONFIG_STATUS_STATE]; in intel_mailbox_get_config_status() 593 if ((res != 0U) && (res != MBOX_CFGSTAT_STATE_CONFIG)) { in intel_mailbox_get_config_status() 594 return res; in intel_mailbox_get_config_status() 597 res = response[RECONFIG_STATUS_PIN_STATUS]; in intel_mailbox_get_config_status() 598 if ((res & PIN_STATUS_NSTATUS) == 0U) { in intel_mailbox_get_config_status() 602 res = response[RECONFIG_STATUS_SOFTFUNC_STATUS]; in intel_mailbox_get_config_status() 603 if ((res & SOFTFUNC_STATUS_SEU_ERROR) != 0U) { in intel_mailbox_get_config_status() 607 if ((res & SOFTFUNC_STATUS_CONF_DONE) == 0U) { in intel_mailbox_get_config_status() 611 if (init_done && (res & SOFTFUNC_STATUS_INIT_DONE) == 0U) { in intel_mailbox_get_config_status()
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