Searched refs:retval (Results 1 – 4 of 4) sorted by relevance
/arm-trusted-firmware-2.8.0/plat/intel/soc/common/ |
A D | socfpga_sip_svc_v2.c | 134 uint32_t retval = 0; in sip_smc_handler_v2() local 145 status = intel_secure_reg_read(x2, &retval); in sip_smc_handler_v2() 146 SMC_RET4(handle, status, x1, retval, x2); in sip_smc_handler_v2() 149 status = intel_secure_reg_write(x2, (uint32_t)x3, &retval); in sip_smc_handler_v2() 150 SMC_RET4(handle, status, x1, retval, x2); in sip_smc_handler_v2() 154 (uint32_t)x4, &retval); in sip_smc_handler_v2() 155 SMC_RET4(handle, status, x1, retval, x2); in sip_smc_handler_v2()
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A D | socfpga_sip_svc.c | 381 *retval = mmio_read_32(reg_addr); in intel_secure_reg_read() 387 uint32_t *retval) in intel_secure_reg_write() argument 399 uint32_t val, uint32_t *retval) in intel_secure_reg_update() argument 402 *retval &= ~mask; in intel_secure_reg_update() 403 *retval |= val & mask; in intel_secure_reg_update() 404 return intel_secure_reg_write(reg_addr, *retval, retval); in intel_secure_reg_update() 681 &retval, &rcv_id); in sip_smc_handler_v1() 682 switch (retval) { in sip_smc_handler_v1() 716 (uint32_t)x3, &retval); in sip_smc_handler_v1() 784 SMC_RET2(handle, status, retval); in sip_smc_handler_v1() [all …]
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/arm-trusted-firmware-2.8.0/plat/intel/soc/common/include/ |
A D | socfpga_sip_svc.h | 198 uint32_t intel_secure_reg_read(uint64_t reg_addr, uint32_t *retval); 200 uint32_t *retval); 202 uint32_t val, uint32_t *retval);
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/arm-trusted-firmware-2.8.0/drivers/brcm/i2c/ |
A D | i2c.c | 866 uint32_t retval = 0U; in i2c_get_bus_speed() local 874 retval = I2C_SPEED_100KHz; in i2c_get_bus_speed() 878 retval = I2C_SPEED_400KHz; in i2c_get_bus_speed() 884 return retval; in i2c_get_bus_speed()
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