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Searched refs:routing (Results 1 – 9 of 9) sorted by relevance

/arm-trusted-firmware-2.8.0/docs/design/
A Dinterrupt-framework-design.rst5 allows EL3 software to configure the interrupt routing behavior. Its main
78 Valid routing models
99 secure state. This is a valid routing model as secure software is in
103 state. This is a valid routing model as secure software in EL3 can
193 borne in mind when choosing the routing model for an interrupt type.
200 effectively routing the other interrupt type also to EL3.
221 specification of the routing model for a type of interrupt.
404 the routing model. It could determine the routing model at build time or at
426 routing model at build time.
510 will be routed to EL3 (as per the routing model where **CSS=1 and
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/arm-trusted-firmware-2.8.0/services/std_svc/sdei/
A Dsdei_main.c282 unsigned int routing; in sdei_event_routing_set() local
314 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_routing_set()
328 plat_ic_set_spi_routing(map->intr, routing, (u_register_t) mpidr); in sdei_event_routing_set()
344 unsigned int routing; in sdei_event_register() local
444 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_register()
446 plat_ic_set_spi_routing(map->intr, routing, in sdei_event_register()
/arm-trusted-firmware-2.8.0/docs/components/
A Dplatform-interrupt-controller-API.rst224 This API should set the routing mode of Share Peripheral Interrupt (SPI)
238 the routing.
A Dras.rst24 As mentioned above, the RAS support in |TF-A| enables routing to and handling of
202 - ``HANDLE_EA_EL3_FIRST_NS=1`` enables routing of External Aborts and SErrors,
A Dexception-handling.rst26 interrupt routing model, TF-A appropriately sets the ``FIQ`` and ``IRQ`` bits of
27 ``SCR_EL3`` register to effect this routing. For most use cases, other than for
150 interrupts at S-EL1. Essentially, this deprecates the routing mode described
537 interrupts. This also results in setting the routing bits in ``SCR_EL3``.
/arm-trusted-firmware-2.8.0/docs/about/
A Dfeatures.rst41 and interrupt routing.
/arm-trusted-firmware-2.8.0/docs/getting_started/
A Dbuild-options.rst886 routing model which routes non-secure interrupts asynchronously from TSP
888 for saving and restoring the TSP context in this routing model. The
889 default routing model (when the value is 0) is to route non-secure
A Dpsci-lib-integration-guide.rst42 additional configuration to be set for non-secure context, like routing
/arm-trusted-firmware-2.8.0/docs/
A Dchange-log.md4168 - arm/n1sdp: Setup multichip gic routing table, update platform macros for
6112 - Enabled wake-up from CPU_SUSPEND to stand-by by temporarily re-routing
6281 - Support has been added to demonstrate routing of IRQs to EL3 instead of S-EL1
6619 (using GICv2 routing only). Demonstrated this working by adding an interrupt

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