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/arm-trusted-firmware-2.8.0/plat/arm/board/n1sdp/fdts/
A Dn1sdp_tb_fw_config.dts19 * In case of having shared Mbed TLS heap between BL1 and BL2,
21 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/plat/arm/board/rde1edge/fdts/
A Drde1edge_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/plat/arm/board/rdn1edge/fdts/
A Drdn1edge_tb_fw_config.dts19 * In case of having shared Mbed TLS heap between BL1 and BL2,
21 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/plat/arm/board/rdn2/fdts/
A Drdn2_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/plat/arm/board/rdv1/fdts/
A Drdv1_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/plat/arm/board/rdv1mc/fdts/
A Drdv1mc_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/plat/arm/board/sgi575/fdts/
A Dsgi575_tb_fw_config.dts20 * In case of having shared Mbed TLS heap between BL1 and BL2,
22 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/services/std_svc/sdei/
A Dsdei_event.c58 sdei_ev_map_t *find_event_map_by_intr(unsigned int intr_num, bool shared) in find_event_map_by_intr() argument
69 mapping = shared ? SDEI_SHARED_MAPPING() : SDEI_PRIVATE_MAPPING(); in find_event_map_by_intr()
A Dsdei_private.h233 sdei_ev_map_t *find_event_map_by_intr(unsigned int intr_num, bool shared);
/arm-trusted-firmware-2.8.0/plat/arm/board/juno/fdts/
A Djuno_tb_fw_config.dts18 * In case of having shared Mbed TLS heap between BL1 and BL2,
20 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/plat/arm/board/morello/fdts/
A Dmorello_tb_fw_config.dts19 * In case of having shared Mbed TLS heap between BL1 and BL2,
21 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/fdts/
A Dstm32mp15-fw-config.dtsi17 /* OP-TEE reserved shared memory: located at DDR top or null size */
20 /* OP-TEE secure memory: located right below OP-TEE reserved shared memory */
A Dfvp-ve-Cortex-A7x1.dts44 compatible = "shared-dma-pool";
/arm-trusted-firmware-2.8.0/plat/arm/board/tc/fdts/
A Dtc_tb_fw_config.dts21 * In case of having shared Mbed TLS heap between BL1 and BL2,
23 * info about the shared heap. This info will be available for
/arm-trusted-firmware-2.8.0/docs/components/
A Ddebugfs-design.rst82 shared buffer is used to pass path string parameters, or e.g. to exchange
92 - Special care is taken with the shared buffer to avoid TOCTOU attacks.
97 - In order to setup the shared buffer, the component consuming the interface
99 - In order to map the shared buffer, BL31 requires enabling the dynamic xlat
101 - Data exchange is limited by the shared buffer length. A large read operation
A Drmm-el3-comms-spec.rst105 passed to RMM in x3. This memory will be used as shared buffer for communication
112 EL3 should also ensure that this shared buffer is always available for use by RMM
124 communication requires the use of the shared area, it is expected that RMM needs
164 ``E_RMM_BOOT_INVALID_SHARED_BUFFER``,Invalid pointer to shared memory area,-5
195 including the platform data, if available, fits inside the RMM EL3 shared
215 be within the shared buffer communicated as part of the boot interface. See
216 :ref:`rmm_cold_boot_interface` for properties of this shared buffer which both
419 ``E_RMM_BAD_ADDR``,``PA`` is outside the shared buffer
420 ``E_RMM_INVAL``,``PA + BSize`` is outside the shared buffer
478 ``E_RMM_BAD_ADDR``,``PA`` is outside the shared buffer
[all …]
A Darm-sip-service.rst97 String parameters are passed through a shared buffer using a specific union:
272 On success, the read data is retrieved from the shared buffer after the
376 Initial call to setup the shared exchange buffer. Notice if successful once,
387 uint64_t Physical address of the shared buffer.
A Dsdei.rst60 private events, and another for shared events. The SDEI dispatcher provides
89 to the private and shared event descriptor arrays, respectively. Note that the
98 shared array.
106 - Statically bound shared and private interrupts must be bound to shared and
166 /* Dynamic shared events */
/arm-trusted-firmware-2.8.0/plat/arm/board/fvp/fdts/
A Dfvp_tb_fw_config.dts22 * In case of having shared Mbed TLS heap between BL1 and BL2,
24 * info about the shared heap. This info will be available for
A Dfvp_fw_config.dts30 * non shared SRAM. The runtime checks ensure we don't
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3288/
A Dplatform.mk27 -I${RK_PLAT_SOC}/include/shared/ \
/arm-trusted-firmware-2.8.0/docs/plat/
A Dnvidia-tegra.rst26 Instruction and 64 KB Data Level 1 caches; and have a 2MB shared Level 2
28 Data Level 1 caches; and also have a 2 MB shared Level 2 unified cache. A
64 48 KB Instruction and 32 KB Data Level 1 caches; and have a 2 MB shared
66 and 32 KB Data Level 1 caches; and have a 512 KB shared Level 2 unified cache.
/arm-trusted-firmware-2.8.0/plat/arm/board/fvp/
A Dfvp_common.c527 size_t plat_rmmd_get_el3_rmm_shared_mem(uintptr_t *shared) in plat_rmmd_get_el3_rmm_shared_mem() argument
529 *shared = (uintptr_t)RMM_SHARED_BASE; in plat_rmmd_get_el3_rmm_shared_mem()
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/
A Dplatform.mk25 -I${RK_PLAT_SOC}/include/shared/ \
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/m0/
A DMakefile27 -I../../include/shared/

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