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Searched refs:spi_read_cache_op (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/st/stm32mp1/
A Dstm32mp1_boot_device.c178 zeromem(&device->spi_read_cache_op, sizeof(struct spi_mem_op)); in plat_get_spi_nand_data()
179 device->spi_read_cache_op.cmd.opcode = SPI_NAND_OP_READ_FROM_CACHE_4X; in plat_get_spi_nand_data()
180 device->spi_read_cache_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in plat_get_spi_nand_data()
181 device->spi_read_cache_op.addr.nbytes = 2U; in plat_get_spi_nand_data()
182 device->spi_read_cache_op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in plat_get_spi_nand_data()
183 device->spi_read_cache_op.dummy.nbytes = 1U; in plat_get_spi_nand_data()
184 device->spi_read_cache_op.dummy.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in plat_get_spi_nand_data()
185 device->spi_read_cache_op.data.buswidth = SPI_MEM_BUSWIDTH_4_LINE; in plat_get_spi_nand_data()
186 device->spi_read_cache_op.data.dir = SPI_MEM_DATA_IN; in plat_get_spi_nand_data()
/arm-trusted-firmware-2.8.0/drivers/mtd/nand/
A Dspi_nand.c98 if (spinand_dev.spi_read_cache_op.data.buswidth == in spi_nand_quad_enable()
187 spinand_dev.spi_read_cache_op.addr.val = offset; in spi_nand_read_from_cache()
190 spinand_dev.spi_read_cache_op.addr.val |= 1U << page_sh; in spi_nand_read_from_cache()
193 spinand_dev.spi_read_cache_op.data.buf = buffer; in spi_nand_read_from_cache()
194 spinand_dev.spi_read_cache_op.data.nbytes = len; in spi_nand_read_from_cache()
196 return spi_mem_exec_op(&spinand_dev.spi_read_cache_op); in spi_nand_read_from_cache()
278 spinand_dev.spi_read_cache_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()
279 spinand_dev.spi_read_cache_op.addr.nbytes = 2U; in spi_nand_init()
280 spinand_dev.spi_read_cache_op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_init()
281 spinand_dev.spi_read_cache_op.dummy.nbytes = 1U; in spi_nand_init()
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/arm-trusted-firmware-2.8.0/include/drivers/
A Dspi_nand.h34 struct spi_mem_op spi_read_cache_op; member

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