| /arm-trusted-firmware-2.8.0/plat/arm/common/aarch64/ |
| A D | execution_state_switch.c | 43 u_register_t spsr, pc, scr, sctlr; in arm_execution_state_switch() local
61 spsr = read_ctx_reg(el3_ctx, CTX_SPSR_EL3); in arm_execution_state_switch()
62 caller_64 = (GET_RW(spsr) == MODE_RW_64); in arm_execution_state_switch()
93 from_el2 = caller_64 ? (GET_EL(spsr) == MODE_EL2) : in arm_execution_state_switch()
94 (GET_M32(spsr) == MODE32_hyp); in arm_execution_state_switch()
129 spsr = SPSR_MODE32((u_register_t) el, in arm_execution_state_switch()
139 spsr = SPSR_64((u_register_t) el, MODE_SP_ELX, in arm_execution_state_switch()
153 ep.spsr = (uint32_t) spsr; in arm_execution_state_switch()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/ |
| A D | bl2_plat_setup.c | 65 uint32_t spsr; in poplar_get_spsr_for_bl33_entry() local
78 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
79 return spsr; in poplar_get_spsr_for_bl33_entry()
84 unsigned int hyp_status, mode, spsr; in poplar_get_spsr_for_bl33_entry() local
95 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in poplar_get_spsr_for_bl33_entry()
97 return spsr; in poplar_get_spsr_for_bl33_entry()
136 bl_mem_params->ep_info.spsr = poplar_get_spsr_for_bl32_entry(); in poplar_bl2_handle_post_image_load()
143 bl_mem_params->ep_info.spsr = poplar_get_spsr_for_bl33_entry(); in poplar_bl2_handle_post_image_load()
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| /arm-trusted-firmware-2.8.0/plat/intel/soc/common/aarch64/ |
| A D | platform_common.c | 44 uint32_t spsr; in socfpga_get_spsr_for_bl33_entry() local
57 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in socfpga_get_spsr_for_bl33_entry()
58 return spsr; in socfpga_get_spsr_for_bl33_entry()
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| /arm-trusted-firmware-2.8.0/plat/brcm/common/ |
| A D | brcm_common.c | 42 uint32_t spsr; in brcm_get_spsr_for_bl33_entry() local
52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in brcm_get_spsr_for_bl33_entry()
53 return spsr; in brcm_get_spsr_for_bl33_entry()
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| /arm-trusted-firmware-2.8.0/plat/arm/common/ |
| A D | arm_common.c | 90 uint32_t spsr; in arm_get_spsr_for_bl33_entry() local
100 spsr = SPSR_64((uint64_t)mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
101 return spsr; in arm_get_spsr_for_bl33_entry()
109 unsigned int hyp_status, mode, spsr; in arm_get_spsr_for_bl33_entry() local
120 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in arm_get_spsr_for_bl33_entry()
122 return spsr; in arm_get_spsr_for_bl33_entry()
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| /arm-trusted-firmware-2.8.0/plat/nxp/common/setup/ |
| A D | ls_bl2_el3_setup.c | 107 uint32_t spsr; in ls_get_spsr_for_bl33_entry() local
117 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in ls_get_spsr_for_bl33_entry()
118 return spsr; in ls_get_spsr_for_bl33_entry()
126 unsigned int hyp_status, mode, spsr; in ls_get_spsr_for_bl33_entry() local
137 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in ls_get_spsr_for_bl33_entry()
139 return spsr; in ls_get_spsr_for_bl33_entry()
247 bl_mem_params->ep_info.spsr = ls_get_spsr_for_bl32_entry(); in ls_bl2_handle_post_image_load()
253 bl_mem_params->ep_info.spsr = ls_get_spsr_for_bl33_entry(); in ls_bl2_handle_post_image_load()
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| /arm-trusted-firmware-2.8.0/services/spd/trusty/ |
| A D | trusty.c | 495 uint32_t spsr; in trusty_setup() local
502 spsr = ns_ep_info->spsr; in trusty_setup()
503 if (GET_RW(spsr) == MODE_RW_64 && GET_EL(spsr) == MODE_EL2) { in trusty_setup()
504 spsr &= ~(MODE_EL_MASK << MODE_EL_SHIFT); in trusty_setup()
505 spsr |= MODE_EL1 << MODE_EL_SHIFT; in trusty_setup()
507 if (GET_RW(spsr) == MODE_RW_32 && GET_M32(spsr) == MODE32_hyp) { in trusty_setup()
508 spsr &= ~(MODE32_MASK << MODE32_SHIFT); in trusty_setup()
509 spsr |= MODE32_svc << MODE32_SHIFT; in trusty_setup()
511 if (spsr != ns_ep_info->spsr) { in trusty_setup()
513 ns_ep_info->spsr, spsr); in trusty_setup()
[all …]
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| /arm-trusted-firmware-2.8.0/services/spd/tlkd/ |
| A D | tlkd_common.c | 85 uint32_t ep_attr, spsr; in tlkd_init_tlk_ep_state() local
98 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state()
100 spsr = SPSR_MODE32(MODE32_svc, in tlkd_init_tlk_ep_state()
112 tlk_entry_point->spsr = spsr; in tlkd_init_tlk_ep_state()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/ |
| A D | hikey_bl2_setup.c | 85 uint32_t spsr; in hikey_get_spsr_for_bl33_entry() local
95 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey_get_spsr_for_bl33_entry()
96 return spsr; in hikey_get_spsr_for_bl33_entry()
101 unsigned int hyp_status, mode, spsr; in hikey_get_spsr_for_bl33_entry() local
112 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey_get_spsr_for_bl33_entry()
114 return spsr; in hikey_get_spsr_for_bl33_entry()
150 bl_mem_params->ep_info.spsr = hikey_get_spsr_for_bl32_entry(); in hikey_bl2_handle_post_image_load()
157 bl_mem_params->ep_info.spsr = hikey_get_spsr_for_bl33_entry(); in hikey_bl2_handle_post_image_load()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/ |
| A D | hikey960_bl2_setup.c | 179 uint32_t spsr; in hikey960_get_spsr_for_bl33_entry() local
189 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey960_get_spsr_for_bl33_entry()
190 return spsr; in hikey960_get_spsr_for_bl33_entry()
195 unsigned int hyp_status, mode, spsr; in hikey960_get_spsr_for_bl33_entry() local
206 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey960_get_spsr_for_bl33_entry()
208 return spsr; in hikey960_get_spsr_for_bl33_entry()
244 bl_mem_params->ep_info.spsr = hikey960_get_spsr_for_bl32_entry(); in hikey960_bl2_handle_post_image_load()
251 bl_mem_params->ep_info.spsr = hikey960_get_spsr_for_bl33_entry(); in hikey960_bl2_handle_post_image_load()
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| /arm-trusted-firmware-2.8.0/plat/qemu/common/ |
| A D | qemu_bl2_setup.c | 122 uint32_t spsr; in qemu_get_spsr_for_bl33_entry() local
134 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry()
136 spsr = SPSR_MODE32(MODE32_svc, in qemu_get_spsr_for_bl33_entry()
140 return spsr; in qemu_get_spsr_for_bl33_entry()
197 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl32_entry(); in qemu_bl2_handle_post_image_load()
225 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry(); in qemu_bl2_handle_post_image_load()
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/common/aarch64/ |
| A D | marvell_common.c | 112 uint32_t spsr; in marvell_get_spsr_for_bl33_entry() local
125 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in marvell_get_spsr_for_bl33_entry()
126 return spsr; in marvell_get_spsr_for_bl33_entry()
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| /arm-trusted-firmware-2.8.0/plat/ti/k3/common/ |
| A D | k3_bl31_setup.c | 47 uint32_t spsr; in k3_get_spsr_for_bl33_entry() local
55 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in k3_get_spsr_for_bl33_entry()
56 return spsr; in k3_get_spsr_for_bl33_entry()
76 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in bl31_early_platform_setup2()
84 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
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| /arm-trusted-firmware-2.8.0/plat/socionext/synquacer/ |
| A D | sq_image_desc.c | 27 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
44 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
61 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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| A D | sq_bl31_setup.c | 95 uint32_t spsr; in sq_get_spsr_for_bl33_entry() local
103 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in sq_get_spsr_for_bl33_entry()
104 return spsr; in sq_get_spsr_for_bl33_entry()
142 bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry(); in bl31_early_platform_setup2()
158 bl33_image_ep_info.spsr = sq_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
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| /arm-trusted-firmware-2.8.0/include/arch/aarch32/ |
| A D | smccc_macros.S | 36 mrs r2, spsr
40 mrs r2, spsr
44 mrs r2, spsr
48 mrs r2, spsr
52 mrs r2, spsr
57 mrs r2, spsr
82 mrs r12, spsr
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mn/ |
| A D | imx8mn_bl31_setup.c | 89 uint32_t spsr; in get_spsr_for_bl33_entry() local
97 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
98 return spsr; in get_spsr_for_bl33_entry()
156 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
164 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mp/ |
| A D | imx8mp_bl31_setup.c | 85 uint32_t spsr; in get_spsr_for_bl33_entry() local
93 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
94 return spsr; in get_spsr_for_bl33_entry()
152 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
160 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
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| /arm-trusted-firmware-2.8.0/plat/intel/soc/agilex/ |
| A D | bl2_plat_setup.c | 147 uint32_t spsr; in get_spsr_for_bl33_entry() local
160 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
161 return spsr; in get_spsr_for_bl33_entry()
174 bl_mem_params->ep_info.spsr = get_spsr_for_bl33_entry(); in bl2_plat_handle_post_image_load()
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| /arm-trusted-firmware-2.8.0/plat/intel/soc/stratix10/ |
| A D | bl2_plat_setup.c | 146 uint32_t spsr; in get_spsr_for_bl33_entry() local
159 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
160 return spsr; in get_spsr_for_bl33_entry()
173 bl_mem_params->ep_info.spsr = get_spsr_for_bl33_entry(); in bl2_plat_handle_post_image_load()
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mq/ |
| A D | imx8mq_bl31_setup.c | 95 uint32_t spsr; in get_spsr_for_bl33_entry() local
103 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
104 return spsr; in get_spsr_for_bl33_entry()
149 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
157 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
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| /arm-trusted-firmware-2.8.0/plat/renesas/common/ |
| A D | bl2_plat_mem_params_desc.c | 32 .ep_info.spsr = SPSR_64(MODE_EL3,
55 .ep_info.spsr = 0,
71 .ep_info.spsr = SPSR_64(BL33_MODE, MODE_SP_ELX,
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mm/ |
| A D | imx8mm_bl31_setup.c | 98 uint32_t spsr; in get_spsr_for_bl33_entry() local
106 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
107 return spsr; in get_spsr_for_bl33_entry()
159 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
167 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
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| /arm-trusted-firmware-2.8.0/plat/socionext/uniphier/ |
| A D | uniphier_image_desc.c | 49 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
71 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
89 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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| /arm-trusted-firmware-2.8.0/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 58 if (GET_RW(ep->spsr) == MODE_RW_64) { in setup_el1_context()
137 if ((GET_EL(ep->spsr) == MODE_EL2) && is_armv8_4_sel2_present()) { in setup_secure_context()
138 if (GET_RW(ep->spsr) != MODE_RW_64) { in setup_secure_context()
304 if (GET_RW(ep->spsr) == MODE_RW_64) { in setup_context_common()
357 if (((GET_RW(ep->spsr) == MODE_RW_64) && (GET_EL(ep->spsr) == MODE_EL2)) in setup_context_common()
358 || ((GET_RW(ep->spsr) != MODE_RW_64) in setup_context_common()
359 && (GET_M32(ep->spsr) == MODE32_hyp))) { in setup_context_common()
390 write_ctx_reg(state, CTX_SPSR_EL3, ep->spsr); in setup_context_common()
1021 uintptr_t entrypoint, uint32_t spsr) in cm_set_elr_spsr_el3() argument
1032 write_ctx_reg(state, CTX_SPSR_EL3, spsr); in cm_set_elr_spsr_el3()
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