/arm-trusted-firmware-2.8.0/lib/extensions/amu/aarch32/ |
A D | amu_helpers.S | 238 stcopr r1, AMEVTYPER10 /* index 0 */ 240 stcopr r1, AMEVTYPER11 /* index 1 */ 242 stcopr r1, AMEVTYPER12 /* index 2 */ 244 stcopr r1, AMEVTYPER13 /* index 3 */ 246 stcopr r1, AMEVTYPER14 /* index 4 */ 248 stcopr r1, AMEVTYPER15 /* index 5 */ 250 stcopr r1, AMEVTYPER16 /* index 6 */ 252 stcopr r1, AMEVTYPER17 /* index 7 */ 254 stcopr r1, AMEVTYPER18 /* index 8 */ 256 stcopr r1, AMEVTYPER19 /* index 9 */ [all …]
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/arm-trusted-firmware-2.8.0/lib/xlat_tables_v2/aarch32/ |
A D | enable_mmu.S | 31 stcopr r1, MAIR0 35 stcopr r2, TTBCR 64 stcopr r1, SCTLR 88 stcopr r1, HMAIR0 92 stcopr r2, HTCR 116 stcopr r1, HSCTLR
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/arm-trusted-firmware-2.8.0/include/arch/aarch32/ |
A D | el3_common_macros.S | 36 stcopr r0, SCTLR 47 stcopr r0, SCR 83 stcopr r0, NSACR 100 stcopr r0, CPACR 150 stcopr r0, SDCR 177 stcopr r0, PMCR 272 stcopr r0, SCTLR 323 stcopr r0, VBAR 324 stcopr r0, MVBAR
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A D | smccc_macros.S | 29 stcopr r2, SCR 60 stcopr r4, SCR 112 stcopr r5, PMCR 136 stcopr r1, SCR 162 stcopr r1, PMCR 171 stcopr r2, SCR 201 stcopr r4, SCR
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A D | asm_macros.S | 19 stcopr _reg, _coproc; \ 21 stcopr _reg, _coproc 24 stcopr _reg, _coproc 40 .macro stcopr reg, coproc, opc1, CRn, CRm, opc2 macro
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/arm-trusted-firmware-2.8.0/lib/cpus/aarch32/ |
A D | cortex_a15.S | 30 stcopr r0, ACTLR 37 stcopr r0, TLBIMVA 46 stcopr r0, ACTLR 83 stcopr r0, CORTEX_A15_ACTLR2 147 stcopr r0, ACTLR 149 stcopr r0, VBAR 150 stcopr r0, MVBAR
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A D | cortex_a17.S | 24 stcopr r0, ACTLR 33 stcopr r0, ACTLR 56 stcopr r0, CORTEX_A17_IMP_DEF_REG1 84 stcopr r0, CORTEX_A17_IMP_DEF_REG1 143 stcopr r0, VBAR 144 stcopr r0, MVBAR
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A D | cortex_a9.S | 24 stcopr r0, ACTLR 33 stcopr r0, ACTLR 81 stcopr r0, VBAR 82 stcopr r0, MVBAR
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A D | cortex_a12.S | 24 stcopr r0, ACTLR 33 stcopr r0, ACTLR
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A D | cortex_a5.S | 24 stcopr r0, ACTLR 33 stcopr r0, ACTLR
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A D | cortex_a7.S | 24 stcopr r0, ACTLR 33 stcopr r0, ACTLR
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A D | cortex_a72.S | 58 stcopr r0, DBGOSDLR
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/arm-trusted-firmware-2.8.0/plat/arm/board/juno/aarch32/ |
A D | juno_helpers.S | 56 stcopr r0, CNTKCTL 70 stcopr r0, CORTEX_A57_L2CTLR 106 stcopr r0, CORTEX_A57_L2CTLR 141 stcopr r0, CORTEX_A72_L2CTLR
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/arm-trusted-firmware-2.8.0/bl1/aarch32/ |
A D | bl1_exceptions.S | 64 stcopr r0, TLBIALL 110 stcopr r0, SCR 132 stcopr r9, SCTLR 154 stcopr r0, TLBIALL
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A D | bl1_entrypoint.S | 91 stcopr r0, TLBIALL
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/arm-trusted-firmware-2.8.0/lib/aarch32/ |
A D | cache_helpers.S | 31 stcopr r0, \coproc, \opc1, \CRn, \CRm, \opc2 105 stcopr r1, CSSELR // select current cache level in csselr 147 stcopr r6, CSSELR //select cache level 0 in csselr 153 stcopr r0, DCISW 155 stcopr r0, DCCISW 157 stcopr r0, DCCSW
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A D | misc_helpers.S | 179 stcopr r0, BPIALL 184 stcopr r0, SCTLR
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/arm-trusted-firmware-2.8.0/bl2u/aarch32/ |
A D | bl2u_entrypoint.S | 41 stcopr r0, VBAR 51 stcopr r0, SCTLR
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/arm-trusted-firmware-2.8.0/lib/extensions/mtpmu/aarch32/ |
A D | mtpmu.S | 82 stcopr r0, SDCR 102 stcopr r0, HDCR
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/arm-trusted-firmware-2.8.0/lib/psci/aarch32/ |
A D | psci_helpers.S | 91 stcopr r0, SCTLR 111 stcopr r1, SCTLR
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/arm-trusted-firmware-2.8.0/bl2/aarch32/ |
A D | bl2_entrypoint.S | 42 stcopr r0, VBAR 52 stcopr r0, SCTLR
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A D | bl2_run_next_image.S | 24 stcopr r0, TLBIALL
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/arm-trusted-firmware-2.8.0/bl32/sp_min/aarch32/ |
A D | entrypoint.S | 37 stcopr \reg, SCR 221 stcopr r0, SCR 265 stcopr r0, SCR
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/arm-trusted-firmware-2.8.0/bl32/sp_min/ |
A D | wa_cve_2017_5715_bpiall.S | 26 stcopr r0, BPIALL
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A D | wa_cve_2017_5715_icache_inv.S | 27 stcopr r0, ICIALLU
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