Searched refs:table_pll (Results 1 – 15 of 15) sorted by relevance
/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/ |
A D | mt_spm_cond.c | 135 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check() 137 if (res->table_pll != 0U) { in mt_spm_cond_check() 139 (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check() 142 } else if ((src->table_pll & dest->table_pll) != 0U) { in mt_spm_cond_check() 184 spm_cond_t.table_pll = 0U; in mt_spm_cond_update() 186 spm_cond_t.table_pll |= PLL_BIT_MFGPLL; in mt_spm_cond_update() 190 spm_cond_t.table_pll |= PLL_BIT_MMPLL; in mt_spm_cond_update() 194 spm_cond_t.table_pll |= PLL_BIT_UNIVPLL; in mt_spm_cond_update() 198 spm_cond_t.table_pll |= PLL_BIT_MSDCPLL; in mt_spm_cond_update() 202 spm_cond_t.table_pll |= PLL_BIT_TVDPLL; in mt_spm_cond_update()
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A D | mt_spm_cond.h | 46 unsigned int table_pll; member
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/ |
A D | mt_spm_cond.c | 129 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check() 131 if (res->table_pll != 0U) { in mt_spm_cond_check() 132 blocked |= (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check() 135 } else if ((src->table_pll & dest->table_pll) != 0U) { in mt_spm_cond_check() 176 spm_cond_t.table_pll = 0U; in mt_spm_cond_update() 178 spm_cond_t.table_pll |= PLL_BIT_MFGPLL; in mt_spm_cond_update() 182 spm_cond_t.table_pll |= PLL_BIT_MMPLL; in mt_spm_cond_update() 186 spm_cond_t.table_pll |= PLL_BIT_UNIVPLL; in mt_spm_cond_update() 190 spm_cond_t.table_pll |= PLL_BIT_MSDCPLL; in mt_spm_cond_update() 194 spm_cond_t.table_pll |= PLL_BIT_TVDPLL; in mt_spm_cond_update()
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A D | mt_spm_cond.h | 48 unsigned int table_pll; member
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/ |
A D | mt_spm_cond.c | 152 res->table_pll = (src->table_pll & dest->table_pll); in mt_spm_cond_check() 154 if (res->table_pll != 0U) { in mt_spm_cond_check() 156 (res->table_pll << SPM_COND_BLOCKED_PLL_IDX) | in mt_spm_cond_check() 159 } else if ((src->table_pll & dest->table_pll) != 0U) { in mt_spm_cond_check() 200 spm_cond_t.table_pll = 0U; in mt_spm_cond_update() 202 spm_cond_t.table_pll |= PLL_BIT_MFGPLL; in mt_spm_cond_update() 206 spm_cond_t.table_pll |= PLL_BIT_MMPLL; in mt_spm_cond_update() 210 spm_cond_t.table_pll |= PLL_BIT_UNIVPLL; in mt_spm_cond_update() 214 spm_cond_t.table_pll |= PLL_BIT_MSDCPLL; in mt_spm_cond_update() 218 spm_cond_t.table_pll |= PLL_BIT_TVDPLL; in mt_spm_cond_update()
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A D | mt_spm_cond.h | 63 unsigned int table_pll; member
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/drivers/spm/constraints/ |
A D | mt_spm_rc_dram.c | 67 .table_pll = 0U, 72 .table_pll = 0U,
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A D | mt_spm_rc_syspll.c | 65 .table_pll = 0U, 70 .table_pll = 0U,
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A D | mt_spm_rc_bus26m.c | 76 .table_pll = (PLL_BIT_UNIVPLL | 85 .table_pll = 0U,
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/drivers/spm/constraints/ |
A D | mt_spm_rc_dram.c | 58 .table_pll = 0U, 63 .table_pll = 0U,
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A D | mt_spm_rc_syspll.c | 63 .table_pll = 0U, 68 .table_pll = 0U,
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A D | mt_spm_rc_bus26m.c | 72 .table_pll = (PLL_BIT_UNIVPLL | PLL_BIT_MFGPLL | 79 .table_pll = 0U,
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/arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/drivers/spm/constraints/ |
A D | mt_spm_rc_dram.c | 58 .table_pll = 0U, 63 .table_pll = 0U,
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A D | mt_spm_rc_syspll.c | 57 .table_pll = 0U, 62 .table_pll = 0U,
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A D | mt_spm_rc_bus26m.c | 68 .table_pll = (PLL_BIT_UNIVPLL | PLL_BIT_MFGPLL | 75 .table_pll = 0U,
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