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/arm-trusted-firmware-2.8.0/plat/intel/soc/agilex/include/
A Dagilex_memory_controller.h73 #define ACT_TO_ACT_DIFF_BANK(value) (((value) & 0x00fc0000) >> 18) argument
74 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
75 #define ACT_TO_RDWR(value) (((value) & 0x0000003f) >> 0) argument
76 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
79 #define RD_TO_RD_DIFF_CHIP(value) (((value) & 0x00000fc0) >> 6) argument
80 #define RD_TO_WR_DIFF_CHIP(value) (((value) & 0x3f000000) >> 24) argument
81 #define RD_TO_WR(value) (((value) & 0x00fc0000) >> 18) argument
82 #define RD_TO_PCH(value) (((value) & 0x00000fc0) >> 6) argument
86 #define CALTIMING3_WR_TO_RD(value) (((value) & 0x00000fc0) >> 6) argument
89 #define PCH_TO_VALID(value) (((value) & 0x00000fc0) >> 6) argument
[all …]
/arm-trusted-firmware-2.8.0/plat/intel/soc/stratix10/include/
A Ds10_memory_controller.h72 #define ACT_TO_ACT_DIFF_BANK(value) (((value) & 0x00fc0000) >> 18) argument
73 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
74 #define ACT_TO_RDWR(value) (((value) & 0x0000003f) >> 0) argument
75 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
78 #define RD_TO_RD_DIFF_CHIP(value) (((value) & 0x00000fc0) >> 6) argument
79 #define RD_TO_WR_DIFF_CHIP(value) (((value) & 0x3f000000) >> 24) argument
80 #define RD_TO_WR(value) (((value) & 0x00fc0000) >> 18) argument
81 #define RD_TO_PCH(value) (((value) & 0x00000fc0) >> 6) argument
84 #define CALTIMING3_WR_TO_RD_DIFF_CHIP(value) (((value) & 0x0003f000) >> 12) argument
85 #define CALTIMING3_WR_TO_RD(value) (((value) & 0x00000fc0) >> 6) argument
[all …]
/arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/pm_service/
A Dpm_svc_main.c141 uint32_t value; in zynqmp_sgi7_irq() local
160 value = (value & RESTART_SCOPE_MASK) >> RESTART_SCOPE_SHIFT; in zynqmp_sgi7_irq()
353 uint32_t value = 0; in pm_smc_handler() local
371 uint32_t value = 0; in pm_smc_handler() local
398 uint32_t value = 0; in pm_smc_handler() local
410 uint32_t value = 0; in pm_smc_handler() local
424 uint64_t value = 0; in pm_smc_handler() local
476 &value); in pm_smc_handler()
595 uint32_t value; in em_smc_handler() local
603 uint32_t value; in em_smc_handler() local
[all …]
A Dpm_api_ioctl.c95 uint32_t value) in pm_ioctl_config_boot_addr() argument
160 uint32_t value) in pm_ioctl_set_tapdelay_bypass() argument
182 uint32_t value) in pm_ioctl_set_sgmii_mode() argument
187 if (value != PM_SGMII_DISABLE && value != PM_SGMII_ENABLE) { in pm_ioctl_set_sgmii_mode()
291 uint32_t value) in pm_ioctl_sd_set_tapdelay() argument
328 if (value == 0U) { in pm_ioctl_sd_set_tapdelay()
345 (value << shift)); in pm_ioctl_sd_set_tapdelay()
363 (value << shift)); in pm_ioctl_sd_set_tapdelay()
470 uint32_t value) in pm_ioctl_write_ggs() argument
491 uint32_t *value) in pm_ioctl_read_ggs() argument
[all …]
A Dpm_api_sys.h116 uint32_t value);
124 enum pm_ret_status pm_get_chipid(uint32_t *value);
135 uint32_t *value);
166 uint32_t *value);
171 uint32_t *value);
174 uint32_t *value);
178 uint32_t value,
182 uint32_t value);
185 uint32_t *value);
189 uint32_t address_low, uint32_t *value);
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/arm-trusted-firmware-2.8.0/plat/mediatek/drivers/ptp3/
A Dptp3_common.c17 unsigned int i, addr, value; in ptp3_init() local
30 value = ptp3_cfg2[i][PTP3_CFG_VALUE]; in ptp3_init()
32 mmio_write_32(addr, value); in ptp3_init()
39 value = ptp3_cfg2[i][PTP3_CFG_VALUE] + 0x5E0; in ptp3_init()
41 value = ptp3_cfg2[i][PTP3_CFG_VALUE]; in ptp3_init()
43 mmio_write_32(addr, value); in ptp3_init()
49 value = ptp3_cfg3[PTP3_CFG_VALUE]; in ptp3_init()
52 value = ptp3_cfg3_ext[PTP3_CFG_VALUE]; in ptp3_init()
54 mmio_write_32(addr, value & PTP3_CFG3_MASK1); in ptp3_init()
55 mmio_write_32(addr, value & PTP3_CFG3_MASK2); in ptp3_init()
[all …]
/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/include/
A Dscp_utils.h22 #define SCP_WRITE_CFG(cfg, value) mmio_write_32(CRMU_CFG_BASE + \ argument
23 offsetof(M0CFG, cfg), value)
27 #define SCP_WRITE_CFG16(cfg, value) mmio_write_16(CRMU_CFG_BASE + \ argument
28 offsetof(M0CFG, cfg), value)
32 #define SCP_WRITE_CFG8(cfg, value) mmio_write_8(CRMU_CFG_BASE + \ argument
33 offsetof(M0CFG, cfg), value)
/arm-trusted-firmware-2.8.0/include/lib/
A Dmmio.h12 static inline void mmio_write_8(uintptr_t addr, uint8_t value) in mmio_write_8() argument
14 *(volatile uint8_t*)addr = value; in mmio_write_8()
22 static inline void mmio_write_16(uintptr_t addr, uint16_t value) in mmio_write_16() argument
24 *(volatile uint16_t*)addr = value; in mmio_write_16()
39 static inline void mmio_write_32(uintptr_t addr, uint32_t value) in mmio_write_32() argument
41 *(volatile uint32_t*)addr = value; in mmio_write_32()
49 static inline void mmio_write_64(uintptr_t addr, uint64_t value) in mmio_write_64() argument
51 *(volatile uint64_t*)addr = value; in mmio_write_64()
A Dutils_def.h98 #define round_boundary(value, boundary) \ argument
99 ((__typeof__(value))((boundary) - 1))
101 #define round_up(value, boundary) \ argument
102 ((((value) - 1) | round_boundary(value, boundary)) + 1)
104 #define round_down(value, boundary) \ argument
105 ((value) & ~round_boundary(value, boundary))
110 #define is_aligned(value, boundary) \ argument
111 (round_up((uintptr_t) value, boundary) == \
112 round_down((uintptr_t) value, boundary))
/arm-trusted-firmware-2.8.0/drivers/arm/sp805/
A Dsp805.c14 static inline void sp805_write_wdog_load(uintptr_t base, uint32_t value) in sp805_write_wdog_load() argument
16 mmio_write_32(base + SP805_WDOG_LOAD_OFF, value); in sp805_write_wdog_load()
19 static inline void sp805_write_wdog_ctrl(uintptr_t base, uint32_t value) in sp805_write_wdog_ctrl() argument
21 mmio_write_32(base + SP805_WDOG_CTR_OFF, value); in sp805_write_wdog_ctrl()
24 static inline void sp805_write_wdog_lock(uintptr_t base, uint32_t value) in sp805_write_wdog_lock() argument
26 mmio_write_32(base + SP805_WDOG_LOCK_OFF, value); in sp805_write_wdog_lock()
/arm-trusted-firmware-2.8.0/lib/extensions/amu/aarch32/
A Damu.c51 ((value << TAM_SHIFT) & TAM_BIT)); in write_hcptr_tam()
92 uint32_t value = read_amcntenset0(); in write_amcntenset0_px() local
94 value &= ~AMCNTENSET0_Pn_MASK; in write_amcntenset0_px()
98 write_amcntenset0(value); in write_amcntenset0_px()
103 uint32_t value = read_amcntenset1(); in write_amcntenset1_px() local
105 value &= ~AMCNTENSET1_Pn_MASK; in write_amcntenset1_px()
109 write_amcntenset1(value); in write_amcntenset1_px()
116 value &= ~AMCNTENCLR0_Pn_MASK; in write_amcntenclr0_px()
119 write_amcntenclr0(value); in write_amcntenclr0_px()
126 value &= ~AMCNTENCLR1_Pn_MASK; in write_amcntenclr1_px()
[all …]
/arm-trusted-firmware-2.8.0/lib/extensions/amu/aarch64/
A Damu.c82 value &= ~TAM_BIT; in ctx_write_cptr_el3_tam()
83 value |= (tam << TAM_SHIFT) & TAM_BIT; in ctx_write_cptr_el3_tam()
92 value &= ~SCR_AMVOFFEN_BIT; in ctx_write_scr_el3_amvoffen()
150 value &= ~AMCNTENSET0_EL0_Pn_MASK; in write_amcntenset0_el0_px()
153 write_amcntenset0_el0(value); in write_amcntenset0_el0_px()
160 value &= ~AMCNTENSET1_EL0_Pn_MASK; in write_amcntenset1_el0_px()
163 write_amcntenset1_el0(value); in write_amcntenset1_el0_px()
170 value &= ~AMCNTENCLR0_EL0_Pn_MASK; in write_amcntenclr0_el0_px()
173 write_amcntenclr0_el0(value); in write_amcntenclr0_el0_px()
180 value &= ~AMCNTENCLR1_EL0_Pn_MASK; in write_amcntenclr1_el0_px()
[all …]
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/
A Dhikey_ddr.c1224 uint32_t value; in lpddrx_save_ddl_para_bypass() local
1242 uint32_t value; in lpddrx_save_ddl_para_mission() local
1247 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
1249 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
1251 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
1253 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
1255 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
1257 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
1289 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
1291 ddr_ddl_para[cnt++] = value; in lpddrx_save_ddl_para_mission()
[all …]
/arm-trusted-firmware-2.8.0/lib/compiler-rt/builtins/
A Dint_lib.h122 int __inline __builtin_ctz(uint32_t value) { in __builtin_ctz() argument
124 if (_BitScanForward(&trailing_zero, value)) in __builtin_ctz()
129 int __inline __builtin_clz(uint32_t value) { in __builtin_clz() argument
131 if (_BitScanReverse(&leading_zero, value)) in __builtin_clz()
137 int __inline __builtin_clzll(uint64_t value) { in __builtin_clzll() argument
139 if (_BitScanReverse64(&leading_zero, value)) in __builtin_clzll()
144 int __inline __builtin_clzll(uint64_t value) { in __builtin_clzll() argument
145 if (value == 0) in __builtin_clzll()
147 uint32_t msh = (uint32_t)(value >> 32); in __builtin_clzll()
148 uint32_t lsh = (uint32_t)(value & 0xFFFFFFFF); in __builtin_clzll()
/arm-trusted-firmware-2.8.0/drivers/arm/sbsa/
A Dsbsa.c13 void sbsa_watchdog_offset_reg_write(uintptr_t base, uint64_t value) in sbsa_watchdog_offset_reg_write() argument
15 assert((value >> SBSA_WDOG_WOR_WIDTH) == 0); in sbsa_watchdog_offset_reg_write()
17 ((uint32_t)value & UINT32_MAX)); in sbsa_watchdog_offset_reg_write()
18 mmio_write_32(base + SBSA_WDOG_WOR_HIGH_OFFSET, (uint32_t)(value >> 32)); in sbsa_watchdog_offset_reg_write()
/arm-trusted-firmware-2.8.0/docs/components/
A Dffa-manifest-binding.rst11 - value type: <string>
21 - value type: <u32>
36 - value type: <u32>
40 - value type: <u32>
48 - value type: <u32>
59 - value type: <u32>
67 - value type: <u32>
74 - value type: <u64>
80 - value type: <u64>
86 - value type: <u32>
[all …]
/arm-trusted-firmware-2.8.0/lib/mpmm/
A Dmpmm.c27 uint64_t value = read_cpumpmmcr_el3(); in write_cpumpmmcr_el3_mpmm_en() local
29 value &= ~(CPUMPMMCR_EL3_MPMM_EN_MASK << CPUMPMMCR_EL3_MPMM_EN_SHIFT); in write_cpumpmmcr_el3_mpmm_en()
30 value |= (mpmm_en & CPUMPMMCR_EL3_MPMM_EN_MASK) << in write_cpumpmmcr_el3_mpmm_en()
33 write_cpumpmmcr_el3(value); in write_cpumpmmcr_el3_mpmm_en()
/arm-trusted-firmware-2.8.0/drivers/st/bsec/
A Dbsec2.c246 uint32_t value; in bsec_set_config() local
295 uint32_t value; in bsec_get_config() local
330 bool value; in bsec_shadow_register() local
337 result = bsec_read_sr_lock(otp, &value); in bsec_shadow_register()
343 if (value) { in bsec_shadow_register()
410 bool value; in bsec_write_otp() local
416 result = bsec_read_sw_lock(otp, &value); in bsec_write_otp()
422 if (value) { in bsec_write_otp()
719 *value = ((bank_value & otp_mask) != 0U); in bsec_read_sr_lock()
767 *value = ((bank_value & otp_mask) != 0U); in bsec_read_sw_lock()
[all …]
/arm-trusted-firmware-2.8.0/common/
A Dfdt_wrappers.c27 unsigned int cells, uint32_t *value) in fdt_read_uint32_array() argument
34 assert(value != NULL); in fdt_read_uint32_array()
51 value[i] = fdt32_to_cpu(prop[i]); in fdt_read_uint32_array()
58 uint32_t *value) in fdt_read_uint32() argument
77 uint64_t *value) in fdt_read_uint64() argument
104 assert(value != NULL); in fdtw_read_bytes()
121 (void)memcpy(value, ptr, length); in fdtw_read_bytes()
196 unsigned int cells, void *value) in fdtw_write_inplace_cells() argument
202 assert(value != NULL); in fdtw_write_inplace_cells()
209 *(uint64_t *)value = cpu_to_fdt64(*(uint64_t *)value); in fdtw_write_inplace_cells()
[all …]
/arm-trusted-firmware-2.8.0/include/common/
A Dfdt_wrappers.h18 uint32_t *value);
22 uint64_t *value);
24 unsigned int cells, uint32_t *value);
30 unsigned int cells, void *value);
32 unsigned int length, void *value);
/arm-trusted-firmware-2.8.0/drivers/renesas/common/emmc/
A Demmc_utility.c81 uint32_t value; in emmc_bit_field() local
87 value = data[index_top]; in emmc_bit_field()
89 value = in emmc_bit_field()
92 value = in emmc_bit_field()
97 value = in emmc_bit_field()
104 value = ((value >> (bottom & 0x07)) & ((1 << (top - bottom + 1)) - 1)); in emmc_bit_field()
106 return value; in emmc_bit_field()
/arm-trusted-firmware-2.8.0/drivers/renesas/rcar/qos/
A Dqos_common.h111 static inline void io_write_32(uintptr_t addr, uint32_t value) in io_write_32() argument
113 *(volatile uint32_t *)addr = value; in io_write_32()
121 static inline void io_write_64(uintptr_t addr, uint64_t value) in io_write_64() argument
123 *(volatile uint64_t *)addr = value; in io_write_64()
128 uint64_t value; member
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/
A Dhikey960_boardid.c63 static int get_adc(unsigned int channel, unsigned int *value) in get_adc() argument
93 *value = data; in get_adc()
97 static int get_value(unsigned int channel, unsigned int *value) in get_value() argument
101 ret = get_adc(channel, value); in get_value()
106 ret = ((*value & HKADC_VALID_VALUE) * HKADC_VREF_1V8) / HKADC_ACCURACY; in get_value()
107 *value = ret; in get_value()
/arm-trusted-firmware-2.8.0/drivers/renesas/common/
A Dcommon.c18 uint32_t value = regval; in cpg_write() local
20 mmio_write_32(CPG_CPGWPR, ~value); in cpg_write()
21 mmio_write_32(regadr, value); in cpg_write()
/arm-trusted-firmware-2.8.0/drivers/gpio/
A Dgpio.c50 void gpio_set_value(int gpio, int value) in gpio_set_value() argument
54 assert((value == GPIO_LEVEL_LOW) || (value == GPIO_LEVEL_HIGH)); in gpio_set_value()
57 ops->set_value(gpio, value); in gpio_set_value()

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