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/l4re-core-master/sigma0/server/src/
A Dmemmap.cc36 enum Memory_type { Ram, Io_mem, Io_mem_cached }; enumerator
120 case Ram: in map_mem()
221 map_mem((l4_fpage_t&)l4_utcb_mr_u(utcb)->mr[1], Ram, t, answer); in handle_sigma0_request()

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