Searched refs:apic_write (Results 1 – 4 of 4) sorted by relevance
| /l4re-core-master/l4util/include/ARCH-x86/ |
| A D | apic.h | 145 apic_write(APIC_LVT0, tmp_val); in apic_lvt0_disable_irq()
156 apic_write(APIC_LVT0, tmp_val); in apic_lvt0_enable_irq()
167 apic_write(APIC_LVT1, tmp_val); in apic_lvt1_disable_irq()
178 apic_write(APIC_LVT1, tmp_val); in apic_lvt1_enable_irq()
187 apic_write(APIC_TMICT,value); in apic_timer_write()
206 apic_write(APIC_LVTT, tmp_val); in apic_timer_disable_irq()
217 apic_write(APIC_LVTT, tmp_val); in apic_timer_enable_irq()
228 apic_write(APIC_LVTT, tmp_val); in apic_timer_set_periodic()
239 apic_write(APIC_LVTT, tmp_val); in apic_timer_set_one_shot()
252 apic_write(APIC_LVTT, tmp_val); in apic_timer_assign_irq()
[all …]
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| /l4re-core-master/l4util/include/ARCH-amd64/ |
| A D | apic.h | 145 apic_write(APIC_LVT0, tmp_val); in apic_lvt0_disable_irq()
156 apic_write(APIC_LVT0, tmp_val); in apic_lvt0_enable_irq()
167 apic_write(APIC_LVT1, tmp_val); in apic_lvt1_disable_irq()
178 apic_write(APIC_LVT1, tmp_val); in apic_lvt1_enable_irq()
187 apic_write(APIC_TMICT,value); in apic_timer_write()
206 apic_write(APIC_LVTT, tmp_val); in apic_timer_disable_irq()
217 apic_write(APIC_LVTT, tmp_val); in apic_timer_enable_irq()
228 apic_write(APIC_LVTT, tmp_val); in apic_timer_set_periodic()
239 apic_write(APIC_LVTT, tmp_val); in apic_timer_set_one_shot()
252 apic_write(APIC_LVTT, tmp_val); in apic_timer_assign_irq()
[all …]
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| /l4re-core-master/l4util/lib/src/ARCH-x86/ |
| A D | apic.c | 87 apic_write(APIC_TDCR, tmp_value); in apic_timer_set_divisor()
152 apic_write(APIC_LVT0, tmp_val); in apic_activate_by_io()
158 apic_write(APIC_LVT1, tmp_val); in apic_activate_by_io()
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| /l4re-core-master/l4util/lib/src/ARCH-amd64/ |
| A D | apic.c | 87 apic_write(APIC_TDCR, tmp_value); in apic_timer_set_divisor()
152 apic_write(APIC_LVT0, tmp_val); in apic_activate_by_io()
158 apic_write(APIC_LVT1, tmp_val); in apic_activate_by_io()
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