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Searched refs:l4_uint32_t (Results 1 – 25 of 40) sorted by relevance

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/l4re-core-master/l4util/include/
A Dmb_info.h95 l4_uint32_t offset;
134 l4_uint32_t win_func;
219 l4_uint32_t addr;
220 l4_uint32_t pad;
227 l4_uint32_t num;
228 l4_uint32_t size;
229 l4_uint32_t addr;
360 l4_uint32_t mod_end;
368 l4_uint32_t type;
386 l4_uint32_t type;
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A Datomic.h68 l4_uint32_t cmp_val, l4_uint32_t new_val);
131 l4util_xchg32(volatile l4_uint32_t * dest, l4_uint32_t val);
183 l4util_add32(volatile l4_uint32_t *dest, l4_uint32_t val);
192 l4util_sub32(volatile l4_uint32_t *dest, l4_uint32_t val);
201 l4util_and32(volatile l4_uint32_t *dest, l4_uint32_t val);
210 l4util_or32(volatile l4_uint32_t *dest, l4_uint32_t val);
344 l4_uint32_t cmp_val, l4_uint32_t new_val) in l4util_cmpxchg32()
464 l4util_add32(volatile l4_uint32_t *dest, l4_uint32_t val) in l4util_add32()
480 l4util_sub32(volatile l4_uint32_t *dest, l4_uint32_t val) in l4util_sub32()
492 l4util_and32(volatile l4_uint32_t *dest, l4_uint32_t val) in l4util_and32()
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A Drand.h37 L4_CV l4_uint32_t
47 l4util_srand (l4_uint32_t seed);
A Dl4mod.h35 l4_uint32_t mods_count; /**< Number of modules */
36 l4_uint32_t _pad;
/l4re-core-master/l4util/include/ARCH-x86/
A Drdtsc.h102 l4_tsc_to_s_and_ns (l4_cpu_time_t tsc, l4_uint32_t *s, l4_uint32_t *ns);
138 L4_INLINE l4_uint32_t
166 L4_CV l4_uint32_t
173 L4_CV l4_uint32_t
182 L4_INLINE l4_uint32_t
210 l4_uint32_t x; in l4_rdtsc_32()
241 l4_uint32_t x; in l4_rdpmc_32()
255 l4_uint32_t dummy; in l4_tsc_to_ns()
279 l4_uint32_t dummy; in l4_tsc_to_us()
299 l4_tsc_to_s_and_ns (l4_cpu_time_t tsc, l4_uint32_t *s, l4_uint32_t *ns) in l4_tsc_to_s_and_ns()
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A Dport_io.h64 L4_INLINE l4_uint32_t
123 l4util_out32(l4_uint32_t value, l4_uint16_t port);
187 L4_INLINE l4_uint32_t
190 l4_uint32_t value; in l4util_in32()
235 l4util_out32(l4_uint32_t value, l4_uint16_t port) in l4util_out32()
A Didt.h35 l4_uint32_t a, b; /**< see Intel doc */
55 idt->desc[nr].a = (l4_uint32_t)handler & 0x0000ffff; in l4util_idt_entry()
56 idt->desc[nr].b = 0x0000ef00 | ((l4_uint32_t)handler & 0xffff0000); in l4util_idt_entry()
/l4re-core-master/l4util/lib/src/ARCH-x86/
A Drdtsc.c17 l4_uint32_t l4_scaler_tsc_to_ns;
18 l4_uint32_t l4_scaler_tsc_to_us;
19 l4_uint32_t l4_scaler_ns_to_tsc;
20 l4_uint32_t l4_scaler_tsc_linux;
23 static inline l4_uint32_t
24 muldiv (l4_uint32_t a, l4_uint32_t mul, l4_uint32_t div) in muldiv()
26 l4_uint32_t dummy; in muldiv()
40 L4_CV l4_uint32_t
77 register l4_uint32_t count; in l4_tsc_init()
136 L4_CV l4_uint32_t
[all …]
A Dperform.c21 l4_uint32_t index;
31 strp6pmc_event(l4_uint32_t event) in strp6pmc_event()
/l4re-core-master/l4util/include/ARCH-amd64/
A Drdtsc.h61 l4_uint32_t l4_rdtsc_32(void);
78 l4_uint32_t l4_rdpmc_32(int ecx);
100 l4_tsc_to_s_and_ns (l4_cpu_time_t tsc, l4_uint32_t *s, l4_uint32_t *ns);
136 L4_INLINE l4_uint32_t
164 L4_CV l4_uint32_t
171 L4_CV l4_uint32_t
180 L4_INLINE l4_uint32_t
231 l4_uint32_t x; in l4_rdpmc_32()
248 l4_uint32_t l4_rdtsc_32(void) in l4_rdtsc_32()
250 l4_uint32_t x; in l4_rdtsc_32()
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A Dperform.h23 extern const char*strp6pmc_event(l4_uint32_t event);
386 static inline l4_uint32_t l4_i686_rdpmc_32(int cntr){ in l4_i686_rdpmc_32()
387 l4_uint32_t x; in l4_i686_rdpmc_32()
/l4re-core-master/l4util/lib/src/ARCH-sparc/
A Datomics.c4 l4_uint32_t
5 __atomic_fetch_add_4(l4_uint32_t *v, l4_uint32_t a, int mm) in __atomic_fetch_add_4()
8 l4_uint32_t
9 __atomic_fetch_sub_4(l4_uint32_t *v, l4_uint32_t a, int mm) in __atomic_fetch_sub_4()
12 l4_uint32_t
13 __atomic_compare_exchange_4(l4_uint32_t *d, l4_uint32_t cmp, in __atomic_compare_exchange_4()
14 l4_uint32_t nv, int weak, int mmok, int mmerr) in __atomic_compare_exchange_4()
/l4re-core-master/l4util/include/ARCH-ppc32/
A Drdtsc.h32 extern l4_uint32_t l4_scaler_tsc_to_us;
33 extern l4_uint32_t l4_scaler_timer_to_tsc;
58 l4_uint32_t l4_rdtsc_32(void);
77 L4_INLINE l4_uint32_t
105 L4_CV l4_uint32_t
113 L4_INLINE l4_uint32_t
122 l4_uint32_t upper = 0, lower = 0; in l4_rdtsc()
144 l4_uint32_t l4_rdtsc_32(void) in l4_rdtsc_32()
146 l4_uint32_t lower; in l4_rdtsc_32()
/l4re-core-master/l4sys/include/
A D__vm-vmx.h92 l4_uint32_t
209 l4_uint32_t
248 l4_uint32_t
470 l4_uint32_t
472 { return *(l4_uint32_t*)(l4_vm_vmx_field_ptr(vmcs, field)); } in l4_vm_vmx_read_32()
505 l4_vm_vmx_write_32(void *vmcs, unsigned field, l4_uint32_t val) L4_NOTHROW in l4_vm_vmx_write_32()
506 { *(l4_uint32_t*)(l4_vm_vmx_field_ptr(vmcs, field)) = val; } in l4_vm_vmx_write_32()
536 l4_uint32_t
539 …l4_uint32_t const *caps = (l4_uint32_t const *)((char const *)(vcpu_state) + L4_VCPU_OFFSET_EXT_IN… in l4_vm_vmx_get_caps_default1()
544 l4_uint32_t
[all …]
A D__vcpu-arm.h24 l4_uint32_t features;
25 l4_uint32_t _rsvd1[14];
64 L4_INLINE l4_uint32_t
67 L4_INLINE l4_uint32_t
69 { return *(l4_uint32_t const *)l4_vcpu_e_ptr(vcpu, id); } in l4_vcpu_e_read_32()
79 l4_vcpu_e_write_32(void *vcpu, unsigned id, l4_uint32_t val) L4_NOTHROW;
82 l4_vcpu_e_write_32(void *vcpu, unsigned id, l4_uint32_t val) L4_NOTHROW in l4_vcpu_e_write_32()
83 { *((l4_uint32_t *)l4_vcpu_e_ptr(vcpu, + id)) = val; } in l4_vcpu_e_write_32()
A Dvhw.h57 l4_uint32_t provider_pid; /**< Host PID of the VHW provider. */
62 l4_uint32_t irq_no; /**< IRQ number. */
63 l4_uint32_t fd; /**< File descriptor. */
71 l4_uint32_t magic; /**< Magic. */
A D__vm-svm.h47 l4_uint32_t intercept_exceptions;
49 l4_uint32_t intercept_instruction0;
50 l4_uint32_t intercept_instruction1;
88 l4_uint32_t limit;
113 l4_uint32_t _reserved1;
A D__kip-32bit.h41 l4_uint32_t magic; /**< Kernel Info Page
44 l4_uint32_t version; ///< Kernel version
/l4re-core-master/l4util/lib/src/ARCH-ppc32/
A Drdtsc.c11 l4_uint32_t l4_scaler_tsc_to_us;
12 l4_uint32_t l4_scaler_timer_to_tsc;
14 l4_uint32_t
/l4re-core-master/l4sys/include/ARCH-arm/
A Dvm.h44 l4_uint32_t group;
45 l4_uint32_t irqs[8];
71 l4_uint32_t cpacr;
A D__kip-arch.h29 l4_uint32_t MIDR, CTR, TCMTR, TLBTR, MPIDR, REVIDR;
30 l4_uint32_t ID_PFR[2], ID_DFR0, ID_AFR0, ID_MMFR[4], ID_ISAR[6];
/l4re-core-master/l4util/lib/src/
A Drand.c22 L4_CV l4_uint32_t
30 l4util_srand (l4_uint32_t seed) in l4util_srand()
/l4re-core-master/l4sys/include/ARCH-arm64/
A D__kip-arch.h29 l4_uint32_t MIDR, CTR, TCMTR, TLBTR, MPIDR, REVIDR;
30 l4_uint32_t ID_PFR[2], ID_DFR0, ID_AFR0, ID_MMFR[4], ID_ISAR[6];
/l4re-core-master/l4util/lib/src/ARCH-amd64/
A Dperform.c19 l4_uint32_t index;
29 strp6pmc_event(l4_uint32_t event) in strp6pmc_event()
/l4re-core-master/moe/server/src/
A Dpages.h19 extern l4_uint32_t *pages;
22 l4_uint32_t &ref_count(void *addr) in ref_count()

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