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/l4re-core-master/uclibc/lib/contrib/uclibc/libc/stdlib/malloc/
A Dfree.c90 start, end, end - start); in __free_to_heap()
98 start, end, end - start); in __free_to_heap()
121 sbrk (start - end); in __free_to_heap()
133 start, end - start); in __free_to_heap()
165 start, mmb_start - start); in __free_to_heap()
166 __heap_free (heap, (void *)start, mmb_start - start); in __free_to_heap()
178 start = mmb_end; in __free_to_heap()
214 if (start != end) in __free_to_heap()
219 start, end - start); in __free_to_heap()
220 __heap_free (heap, (void *)start, end - start); in __free_to_heap()
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/l4re-core-master/sigma0/server/src/
A Dregion.h24 Region(unsigned long start, unsigned long end, unsigned owner = 0 /*free*/,
26 : _l((start & ~Owner_mask) | owner), _h(end), _rights(rights)
32 unsigned long start() const { return _l & ~Owner_mask; } in start() function
36 start(r.start()); in restore_range_from()
42 void start(unsigned long _start) const in start() function
46 bool operator < (Region const &r) const { return end() < r.start(); }
48 { return start() <= r.start() && end() >= r.end(); } in contains()
51 { return start() == r.start() && end() == r.end(); }
53 bool valid() const { return end() >= start(); } in valid()
63 return Region(start, start + size - 1, owner, rights);
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A Dinit_mem.cc46 unsigned long start, end; in init_memory() local
49 start = l4_round_page(md.start()); in init_memory()
54 start = l4_trunc_page(md.start()); in init_memory()
61 Mem_man::ram()->add_free(Region(start, end)); in init_memory()
63 mismatch = Region(start, end, sigma0_taskno, L4_FPAGE_RW); in init_memory()
69 mismatch = Region(start, end, sigma0_taskno, L4_FPAGE_RW); in init_memory()
74 Region(start, end, root_taskno, in init_memory()
77 mismatch = Region(start, end, root_taskno); in init_memory()
82 iomem.add_free(Region(start, end, 0, L4_FPAGE_RW)); in init_memory()
84 Region(start, end, sigma0_taskno, L4_FPAGE_RW))) in init_memory()
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A Dmem_man.cc40 if (rs.start() > 0) in add()
42 rs.start(rs.start()-1); in add()
47 r.start(n->start()); in add()
107 if (n->start() < r.start()) in add_free()
108 r.start(n->start()); in add_free()
156 if (r.start() == r2->start()) in alloc_from()
205 return r.start(); in alloc()
286 if (r2->start() == r.start()) in reserve()
322 if (r2->start() < r.start()) in reserve()
390 if ((i->start() + size - 1) < i->start()) in alloc_first()
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A Dinit.cc41 static void call_init_array(Ctor **start, Ctor **end) in call_init_array() argument
43 for (; start < end; ++start) in call_init_array()
44 if (*start) in call_init_array()
45 (*start)(); in call_init_array()
/l4re-core-master/l4sys/include/ARCH-arm/
A Dcache.h39 unsigned long start,
44 unsigned long start, in l4_cache_op_arm_call() argument
48 register unsigned long _start __asm__ ("r1") = start; in l4_cache_op_arm_call()
81 l4_cache_clean_data(unsigned long start, in l4_cache_clean_data() argument
84 l4_cache_op_arm_call(L4_MEM_CACHE_OP_CLEAN_DATA, start, end); in l4_cache_clean_data()
89 l4_cache_flush_data(unsigned long start, in l4_cache_flush_data() argument
97 l4_cache_inv_data(unsigned long start, in l4_cache_inv_data() argument
100 l4_cache_op_arm_call(L4_MEM_CACHE_OP_INV_DATA, start, end); in l4_cache_inv_data()
105 l4_cache_coherent(unsigned long start, in l4_cache_coherent() argument
108 l4_cache_op_arm_call(L4_MEM_CACHE_OP_COHERENT, start, end); in l4_cache_coherent()
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/l4re-core-master/uclibc/lib/contrib/uclibc/libc/misc/internals/
A Dshared_flat_initfini.c20 void (**start)(void); in __shared_flat_init() local
25 for (start = lib->preinit_array_start; start < end; start++) in __shared_flat_init()
26 (*start)(); in __shared_flat_init()
34 for (start = lib->init_array_start; start < end; start++) in __shared_flat_init()
35 (*start)(); in __shared_flat_init()
42 void (**start)(void); in __shared_flat_fini() local
46 start = lib->fini_array_start; in __shared_flat_fini()
47 for (end = lib->fini_array_end; end > start;) in __shared_flat_fini()
/l4re-core-master/l4util/include/
A Dsplitlog2.h34 l4util_splitlog2_hdl(l4_addr_t start, l4_addr_t end,
46 l4util_splitlog2_size(l4_addr_t start, l4_addr_t end);
53 l4util_splitlog2_hdl(l4_addr_t start, l4_addr_t end, in l4util_splitlog2_hdl() argument
56 if (end < start) in l4util_splitlog2_hdl()
59 while (start <= end) in l4util_splitlog2_hdl()
62 int len2 = l4util_splitlog2_size(start, end); in l4util_splitlog2_hdl()
64 if ((retval = handler(start, start + len - 1, len2))) in l4util_splitlog2_hdl()
66 start += len; in l4util_splitlog2_hdl()
72 l4util_splitlog2_size(l4_addr_t start, l4_addr_t end) in l4util_splitlog2_size() argument
74 int start_bits = l4util_bsf(start); in l4util_splitlog2_size()
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/l4re-core-master/l4sys/include/ARCH-arm64/
A Dcache.h56 if (start > end) \
60 start &= ~(step - 1); \
62 asm volatile ("dsb ish" : : "m"(*((unsigned *)start))); \
63 for (; start != end; start += step) \
64 asm (op ", %1" : "+m"(*((unsigned *)start)) : "r"(start)); \
69 l4_cache_clean_data(unsigned long start, in l4_cache_clean_data() argument
77 l4_cache_flush_data(unsigned long start, in l4_cache_flush_data() argument
85 l4_cache_inv_data(unsigned long start, in l4_cache_inv_data() argument
94 l4_cache_coherent(unsigned long start, in l4_cache_coherent() argument
102 l4_cache_dma_coherent(unsigned long start, in l4_cache_dma_coherent() argument
/l4re-core-master/l4sys/include/ARCH-x86/
A Dcache.h28 l4_cache_clean_data(unsigned long start, in l4_cache_clean_data() argument
31 (void)start; (void)end; in l4_cache_clean_data()
36 l4_cache_flush_data(unsigned long start, in l4_cache_flush_data() argument
39 (void)start; (void)end; in l4_cache_flush_data()
44 l4_cache_inv_data(unsigned long start, in l4_cache_inv_data() argument
47 (void)start; (void)end; in l4_cache_inv_data()
52 l4_cache_coherent(unsigned long start, in l4_cache_coherent() argument
55 (void)start; (void)end; in l4_cache_coherent()
60 l4_cache_dma_coherent(unsigned long start, in l4_cache_dma_coherent() argument
63 (void)start; (void)end; in l4_cache_dma_coherent()
/l4re-core-master/l4sys/include/ARCH-amd64/
A Dcache.h28 l4_cache_clean_data(unsigned long start, in l4_cache_clean_data() argument
31 (void)start; (void)end; in l4_cache_clean_data()
36 l4_cache_flush_data(unsigned long start, in l4_cache_flush_data() argument
39 (void)start; (void)end; in l4_cache_flush_data()
44 l4_cache_inv_data(unsigned long start, in l4_cache_inv_data() argument
47 (void)start; (void)end; in l4_cache_inv_data()
52 l4_cache_coherent(unsigned long start, in l4_cache_coherent() argument
55 (void)start; (void)end; in l4_cache_coherent()
60 l4_cache_dma_coherent(unsigned long start, in l4_cache_dma_coherent() argument
63 (void)start; (void)end; in l4_cache_dma_coherent()
/l4re-core-master/l4sys/include/ARCH-ppc32/
A Dcache.h28 l4_cache_clean_data(unsigned long start, in l4_cache_clean_data() argument
31 (void)start; (void)end; in l4_cache_clean_data()
36 l4_cache_flush_data(unsigned long start, in l4_cache_flush_data() argument
39 (void)start; (void)end; in l4_cache_flush_data()
44 l4_cache_inv_data(unsigned long start, in l4_cache_inv_data() argument
47 (void)start; (void)end; in l4_cache_inv_data()
52 l4_cache_coherent(unsigned long start, in l4_cache_coherent() argument
55 (void)start; (void)end; in l4_cache_coherent()
60 l4_cache_dma_coherent(unsigned long start, in l4_cache_dma_coherent() argument
63 (void)start; (void)end; in l4_cache_dma_coherent()
/l4re-core-master/l4sys/include/ARCH-sparc/
A Dcache.h28 l4_cache_clean_data(unsigned long start, in l4_cache_clean_data() argument
31 (void)start; (void)end; in l4_cache_clean_data()
36 l4_cache_flush_data(unsigned long start, in l4_cache_flush_data() argument
39 (void)start; (void)end; in l4_cache_flush_data()
44 l4_cache_inv_data(unsigned long start, in l4_cache_inv_data() argument
47 (void)start; (void)end; in l4_cache_inv_data()
52 l4_cache_coherent(unsigned long start, in l4_cache_coherent() argument
55 (void)start; (void)end; in l4_cache_coherent()
60 l4_cache_dma_coherent(unsigned long start, in l4_cache_dma_coherent() argument
63 (void)start; (void)end; in l4_cache_dma_coherent()
/l4re-core-master/l4sys/include/ARCH-mips/
A Dcache.h37 EXTERN_C void syncICache(unsigned long start, unsigned long size);
40 l4_cache_clean_data(unsigned long start, in l4_cache_clean_data() argument
46 mr->mr[1] = start; in l4_cache_clean_data()
54 l4_cache_flush_data(unsigned long start, in l4_cache_flush_data() argument
60 mr->mr[1] = start; in l4_cache_flush_data()
68 l4_cache_inv_data(unsigned long start, in l4_cache_inv_data() argument
74 mr->mr[1] = start; in l4_cache_inv_data()
82 l4_cache_coherent(unsigned long start, in l4_cache_coherent() argument
91 for (i = start & ~(step - 1); i < end; i += step) in l4_cache_coherent()
108 l4_cache_dma_coherent(unsigned long start, in l4_cache_dma_coherent() argument
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/l4re-core-master/uclibc/lib/contrib/uclibc/test/regex/
A Dtst-regex2.c62 struct timeval start, stop; in do_test() local
67 gettimeofday(&start, NULL); in do_test()
118 stop.tv_sec -= start.tv_sec; in do_test()
119 if (stop.tv_usec < start.tv_usec) { in do_test()
123 stop.tv_usec -= start.tv_usec; in do_test()
134 struct timeval start, stop; in do_test() local
141 gettimeofday(&start, NULL); in do_test()
194 regs.start[0], regs.end[0], in do_test()
221 regs.start[l], regs.end[l], in do_test()
233 stop.tv_sec -= start.tv_sec; in do_test()
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/l4re-core-master/moe/server/src/
A Dregion.cc23 : Base(Moe::Virt_limit::start, Moe::Virt_limit::end) in Region_map()
30 l4_addr_t start = m.start(); in Region_map() local
33 attach_area(start, end - start + 1, L4Re::Rm::F::Reserved); in Region_map()
47 l4_addr_t offs = adr - r.start(); in map()
58 r.start(), r.end()); in map()
62 *result = Snd_fpage(ds_fpage.fp(), offs + r.start(), Snd_fpage::Map, in map()
69 Region_ops::free(Region_handler const *h, l4_addr_t start, unsigned long size) in free() argument
74 h->memory()->clear(h->offset() + start, size); in free()
A Ddataspace_cont.h21 Dataspace_cont(void *start, unsigned long size,
38 void start(void *start) { _start = (char*)start; } in start() function
39 void *start() { return _start; } in start() function
A Dloader.cc67 bool Loader::start(cxx::String const &init_prog, cxx::String const &cmdline) in start() function in Loader
73 init_prog.len(), init_prog.start(), cmdline.len(), cmdline.start()); in start()
90 _stack.push(L4Re::Env::Cap_entry(i.name().start(), in push_initial_caps()
91 get_initial_cap(i.name().start(), &s))); in push_initial_caps()
100 auto c = get_initial_cap(i.name().start(), &s); in map_initial_caps()
129 Moe_app_model::prog_reserve_area(l4_addr_t *start, unsigned long size, in prog_reserve_area() argument
132 l4_addr_t a = _task->rm()->attach_area(*start, size, flags, align); in prog_reserve_area()
136 *start = a; in prog_reserve_area()
199 argv.al = argv.a0 = _stack.push_str(_prog.start(), _prog.len()); in init_prog()
203 argv.al = _stack.push_str(a.first.start(), a.first.len()); in init_prog()
/l4re-core-master/l4re_kernel/server/src/
A Dregion.cc45 l4_addr_t start = m.start(); in init() local
51 set_limits(start, end); in init()
54 attach_area(start, end - start + 1, L4Re::Rm::F::Reserved); in init()
92 l4_addr_t offset = local_addr - r.start() + h->offset(); in map()
95 return ds->map(offset, flags, local_addr, r.start(), r.end()); in map()
100 Region_ops::free(Region_handler const *h, l4_addr_t start, unsigned long size) in free() argument
109 ds->clear(h->offset() + start, size); in free()
119 i->first.start(), i->first.end(), in debug_dump()
124 i->first.start(), i->first.end(), in debug_dump()
/l4re-core-master/l4re/util/include/
A Dregion_mapping50 { return end() < o.start(); }
52 { return o.start() >= start() && o.end() <= end(); }
54 { return o.start() == start() && o.end() == end(); }
143 _start = start;
173 Region_map(l4_addr_t start, l4_addr_t end) noexcept : _start(start), _end(end) {}
321 else if (dr.start() <= g.start())
344 h.free(dr.start() - g.start(), g.end() + 1 - dr.start());
347 cn->first = Region(g.start(), dr.start() -1);
361 h.free(dr.start() - g.start(), dr.size());
364 const_cast<Item*>((Item const *)r)->first = Region(g.start(), dr.start()-1);
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A Dregion_mapping_svr_257 l4_addr_t start = l4_trunc_page(_start);
65 start = l4_addr_t(rm()->attach((void*)start, size,
69 if (start == L4_INVALID_ADDR)
72 _start = start;
81 if (!rm()->detach_area(start))
108 addr = r->first.start();
134 start = r.start();
146 start = rm()->attach_area(start, size, flags, align);
147 if (start == L4_INVALID_ADDR)
163 x.start = r->first.start();
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/l4re-core-master/l4sys/include/
A Dcache.h59 l4_cache_clean_data(unsigned long start,
77 l4_cache_flush_data(unsigned long start,
99 l4_cache_inv_data(unsigned long start,
114 l4_cache_coherent(unsigned long start,
129 l4_cache_dma_coherent(unsigned long start,
/l4re-core-master/cxx/lib/base/include/
A Dstring71 /// Set start.
92 { return head(start() + end); }
106 if (start >= _start && !eof(start))
111 return String(start, nlen);
136 { return find(c, start()); }
140 { return find(c, start()); }
249 return c - start();
254 return c - start();
286 return c - start();
291 return c - start();
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/l4re-core-master/l4re_c/lib/src/
A Dio_stuff.cc24 l4_addr_t *start, l4_size_t *len)
30 extern "C" int l4io_request_region(l4_uint16_t start, l4_uint16_t len)
36 extern "C" int l4io_release_mem_region(l4_addr_t start, l4_size_t len)
42 extern "C" l4_addr_t l4io_request_mem_region(l4_addr_t start, l4_size_t len,
/l4re-core-master/uclibc/lib/contrib/uclibc/test/time/
A Dclocktest.c19 clock_t start, stop; in main() local
27 start = clock (); in main()
32 stop - start, start, stop); in main()

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1234567891011