Searched refs:AUX_CONTROL (Results 1 – 9 of 9) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_aux.h | 35 SRI(AUX_CONTROL, DP_AUX, id), \
44 SRI(AUX_CONTROL, DP_AUX, id), \
54 uint32_t AUX_CONTROL; member
94 AUX_SF(AUX_CONTROL, AUX_EN, mask_sh),\
116 AUX_SF(AUX_CONTROL, AUX_EN, mask_sh),\
117 AUX_SF(AUX_CONTROL, AUX_RESET, mask_sh),\
118 AUX_SF(AUX_CONTROL, AUX_RESET_DONE, mask_sh),\
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| A D | dce_aux.c | 120 value = REG_READ(AUX_CONTROL); in acquire_engine()
122 AUX_CONTROL, in acquire_engine()
129 AUX_CONTROL, in acquire_engine()
137 AUX_CONTROL, in acquire_engine()
141 REG_WRITE(AUX_CONTROL, value); in acquire_engine()
146 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 1, in acquire_engine()
152 AUX_CONTROL, in acquire_engine()
155 REG_WRITE(AUX_CONTROL, value); in acquire_engine()
157 REG_WAIT(AUX_CONTROL, AUX_RESET_DONE, 0, in acquire_engine()
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| A D | dce_link_encoder.h | 40 SRI(AUX_CONTROL, DP_AUX, id), \
137 uint32_t AUX_CONTROL; member
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| A D | dce_link_encoder.c | 629 uint32_t addr = AUX_REG(AUX_CONTROL); in aux_initialize()
632 set_reg_field_value(value, hpd_source, AUX_CONTROL, AUX_HPD_SEL); in aux_initialize()
633 set_reg_field_value(value, 0, AUX_CONTROL, AUX_LS_READ_EN); in aux_initialize()
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| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | radeon_dp_auxch.c | 104 tmp = RREG32(AUX_CONTROL + aux_offset[instance]); in radeon_dp_aux_transfer_native()
110 WREG32(AUX_CONTROL + aux_offset[instance], tmp); in radeon_dp_aux_transfer_native()
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| A D | nid.h | 826 #define AUX_CONTROL 0x6200 macro
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_link_encoder.h | 35 SRI(AUX_CONTROL, DP_AUX, id), \
74 uint32_t AUX_CONTROL; member
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| A D | dcn10_link_encoder.c | 1416 AUX_REG_UPDATE_2(AUX_CONTROL, in dcn10_aux_initialize()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/ |
| A D | dcn32_resource.h | 288 SRI_ARR(AUX_CONTROL, DP_AUX, id), SRI_ARR(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
561 SRI_ARR(AUX_CONTROL, DP_AUX, id), SRI_ARR(AUX_ARB_CONTROL, DP_AUX, id), \
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