Searched refs:BANK_R_CTX (Results 1 – 6 of 6) sorted by relevance
1148 BANK_R_CTX); in s5p_mfc_configure_2port_memory()1149 if (!mfc_dev->mem_dev[BANK_R_CTX]) { in s5p_mfc_configure_2port_memory()1157 device_unregister(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_configure_2port_memory()1164 bank2_virt = dma_alloc_coherent(mfc_dev->mem_dev[BANK_R_CTX], in s5p_mfc_configure_2port_memory()1168 device_unregister(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_configure_2port_memory()1177 mfc_dev->dma_base[BANK_R_CTX] = bank2_dma_addr - align_size; in s5p_mfc_configure_2port_memory()1184 vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX], in s5p_mfc_configure_2port_memory()1193 device_unregister(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_unconfigure_2port_memory()1195 vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK_R_CTX]); in s5p_mfc_unconfigure_2port_memory()1223 mfc_dev->dma_base[BANK_R_CTX] = mfc_dev->mem_base; in s5p_mfc_configure_common_memory()[all …]
31 #define OFFSETB(x) (((x) - dev->dma_base[BANK_R_CTX]) >> MFC_OFFSET_SHIFT)181 ret = s5p_mfc_alloc_priv_buf(dev, BANK_R_CTX, &ctx->bank2); in s5p_mfc_alloc_codec_buffers_v5()532 *y_addr = dev->dma_base[BANK_R_CTX] + in s5p_mfc_get_enc_frame_buffer_v5()534 *c_addr = dev->dma_base[BANK_R_CTX] + in s5p_mfc_get_enc_frame_buffer_v5()1212 s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX], in s5p_mfc_run_enc_frame()1213 dev->dma_base[BANK_R_CTX]); in s5p_mfc_run_enc_frame()1222 dev->dma_base[BANK_R_CTX], in s5p_mfc_run_enc_frame()1223 dev->dma_base[BANK_R_CTX]); in s5p_mfc_run_enc_frame()
183 mfc_write(dev, dev->dma_base[BANK_R_CTX], in s5p_mfc_init_memctrl()187 &dev->dma_base[BANK_R_CTX]); in s5p_mfc_init_memctrl()
33 #define BANK_R_CTX 1 macro
2421 alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX]; in s5p_mfc_queue_setup()2422 alloc_devs[1] = ctx->dev->mem_dev[BANK_R_CTX]; in s5p_mfc_queue_setup()
962 alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX]; in s5p_mfc_queue_setup()
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