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Searched refs:BYTE0_CLK_SRC (Results 1 – 25 of 26) sorted by relevance

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/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,mmcc-msm8994.h26 #define BYTE0_CLK_SRC 16 macro
A Dqcom,mmcc-msm8974.h42 #define BYTE0_CLK_SRC 33 macro
A Dqcom,mmcc-sdm660.h10 #define BYTE0_CLK_SRC 1 macro
A Dqcom,gcc-msm8916.h52 #define BYTE0_CLK_SRC 43 macro
A Dqcom,mmcc-apq8084.h47 #define BYTE0_CLK_SRC 38 macro
A Dqcom,gcc-msm8909.h37 #define BYTE0_CLK_SRC 25 macro
A Dqcom,gcc-msm8939.h52 #define BYTE0_CLK_SRC 43 macro
A Dqcom,mmcc-msm8998.h25 #define BYTE0_CLK_SRC 16 macro
A Dqcom,gcc-msm8953.h30 #define BYTE0_CLK_SRC 23 macro
A Dqcom,mmcc-msm8996.h42 #define BYTE0_CLK_SRC 33 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/display/msm/
A Dqcom,msm8998-mdss.yaml152 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
/linux-6.3-rc2/drivers/clk/qcom/
A Dmmcc-msm8974.c2468 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
2590 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dgcc-msm8909.c2517 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dmmcc-msm8994.c2425 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dmmcc-sdm660.c2641 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dmmcc-apq8084.c2929 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dmmcc-msm8998.c2652 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dgcc-msm8916.c3185 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dmmcc-msm8996.c3368 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dgcc-msm8939.c3715 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
A Dgcc-msm8953.c4143 [BYTE0_CLK_SRC] = &byte0_clk_src.clkr,
/linux-6.3-rc2/arch/arm64/boot/dts/qcom/
A Dmsm8953.dtsi751 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
A Dmsm8916.dtsi1105 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
A Dsdm630.dtsi1586 assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
/linux-6.3-rc2/arch/arm/boot/dts/
A Dqcom-msm8974.dtsi1929 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;

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