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Searched refs:CLKGEN_FIELD (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/clk/st/
A Dclkgen-fsyn.c89 CLKGEN_FIELD(0x2f0, 0x1, 1),
90 CLKGEN_FIELD(0x2f0, 0x1, 2),
94 CLKGEN_FIELD(0x2f0, 0x1, 9),
95 CLKGEN_FIELD(0x2f0, 0x1, 10),
99 CLKGEN_FIELD(0x308, 0x1, 24),
100 CLKGEN_FIELD(0x30c, 0x1, 24),
107 CLKGEN_FIELD(0x2fc, 0x1, 1),
108 CLKGEN_FIELD(0x2fc, 0x1, 2),
143 CLKGEN_FIELD(0x2a0, 0x1, 1),
144 CLKGEN_FIELD(0x2a0, 0x1, 2),
[all …]
A Dclkgen-pll.c77 .pdn_status = CLKGEN_FIELD(0x2a0, 0x1, 8),
78 .pdn_ctrl = CLKGEN_FIELD(0x2a0, 0x1, 8),
84 .odf_gate = { CLKGEN_FIELD(0x2b4, 0x1, 6) },
112 .pdn_status = CLKGEN_FIELD(0x2c8, 0x1, 8),
113 .pdn_ctrl = CLKGEN_FIELD(0x2c8, 0x1, 8),
138 .pdn_status = CLKGEN_FIELD(0x1a8, 0x1, 0),
139 .pdn_ctrl = CLKGEN_FIELD(0x1a8, 0x1, 0),
147 .cp = CLKGEN_FIELD(0x1a8, C32_CP_MASK, 1),
148 .switch2pll = CLKGEN_FIELD(0x1a4, 0x1, 1),
164 .pdn_status = CLKGEN_FIELD(0x1a8, 0x1, 0),
[all …]
A Dclkgen.h38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ macro

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