Searched refs:CLK_APMIXED_LVDSPLL (Results 1 – 10 of 10) sorted by relevance
/linux-6.3-rc2/include/dt-bindings/clock/ |
A D | mt8167-clk.h | 18 #define CLK_APMIXED_LVDSPLL (CLK_APMIXED_NR_CLK + 1) macro
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A D | mt8135-clk.h | 115 #define CLK_APMIXED_LVDSPLL 8 macro
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A D | mt8173-clk.h | 168 #define CLK_APMIXED_LVDSPLL 13 macro
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A D | mediatek,mt8365-clk.h | 239 #define CLK_APMIXED_LVDSPLL 8 macro
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A D | mt2712-clk.h | 18 #define CLK_APMIXED_LVDSPLL 6 macro
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/linux-6.3-rc2/drivers/clk/mediatek/ |
A D | clk-mt8173-apmixedsys.c | 76 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x2d0, 0x2dc, 0, 0, 21, 0x2d0, 4, 0x0, 0x2d4, 0),
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A D | clk-mt8135.c | 642 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x2b0, 0x2c8, 0x80000000, 0, 21, 0x2b0, 6, 0x0, 0x2b4, 0),
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A D | clk-mt8167.c | 1036 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0, 0,
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A D | clk-mt2712.c | 1238 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x0370, 0x037c, 0x00000100,
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A D | clk-mt8365.c | 846 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x0374, 0x0380, 0x00000001, 0, 22,
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Completed in 17 milliseconds