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Searched refs:CLK_APMIXED_LVDSPLL (Results 1 – 10 of 10) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8167-clk.h18 #define CLK_APMIXED_LVDSPLL (CLK_APMIXED_NR_CLK + 1) macro
A Dmt8135-clk.h115 #define CLK_APMIXED_LVDSPLL 8 macro
A Dmt8173-clk.h168 #define CLK_APMIXED_LVDSPLL 13 macro
A Dmediatek,mt8365-clk.h239 #define CLK_APMIXED_LVDSPLL 8 macro
A Dmt2712-clk.h18 #define CLK_APMIXED_LVDSPLL 6 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8173-apmixedsys.c76 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x2d0, 0x2dc, 0, 0, 21, 0x2d0, 4, 0x0, 0x2d4, 0),
A Dclk-mt8135.c642 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x2b0, 0x2c8, 0x80000000, 0, 21, 0x2b0, 6, 0x0, 0x2b4, 0),
A Dclk-mt8167.c1036 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x01E0, 0x01F0, 0, 0,
A Dclk-mt2712.c1238 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x0370, 0x037c, 0x00000100,
A Dclk-mt8365.c846 PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x0374, 0x0380, 0x00000001, 0, 22,

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