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Searched refs:CLK_APMIXED_MFGPLL (Results 1 – 17 of 17) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8186-apmixedsys.c70 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0314, 0x0320, 0,
127 FH(CLK_APMIXED_MFGPLL, FH_MFGPLL, 0x00DC),
A Dclk-mt8195-apmixedsys.c102 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0340, 0x0350, 0,
A Dclk-mt6797.c645 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0x00000100, 0, 21,
A Dclk-mt6779.c1198 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x0250, 0x025C, 0,
A Dclk-mt6765.c760 PLL(CLK_APMIXED_MFGPLL, "mfgpll", 0x024C, 0x0258, 0,
A Dclk-mt8183.c1062 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0,
A Dclk-mt8192.c1035 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0268, 0x0274, 0x00000000,
A Dclk-mt8365.c836 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0218, 0x0224, 0x00000001, 0, 22,
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt6797-clk.h110 #define CLK_APMIXED_MFGPLL 3 macro
A Dmt6765-clk.h14 #define CLK_APMIXED_MFGPLL 4 macro
A Dmediatek,mt8365-clk.h234 #define CLK_APMIXED_MFGPLL 3 macro
A Dmt6779-clk.h175 #define CLK_APMIXED_MFGPLL 10 macro
A Dmt8183-clk.h18 #define CLK_APMIXED_MFGPLL 7 macro
A Dmt8186-clk.h274 #define CLK_APMIXED_MFGPLL 10 macro
A Dmt8192-clk.h307 #define CLK_APMIXED_MFGPLL 6 macro
A Dmt8195-clk.h380 #define CLK_APMIXED_MFGPLL 21 macro
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt8195.dtsi449 clocks = <&apmixedsys CLK_APMIXED_MFGPLL>;

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