| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | mt8135-clk.h | 111 #define CLK_APMIXED_UNIVPLL 4 macro
|
| A D | mt8516-clk.h | 15 #define CLK_APMIXED_UNIVPLL 2 macro
|
| A D | mediatek,mt6795-clk.h | 143 #define CLK_APMIXED_UNIVPLL 2 macro
|
| A D | mt6797-clk.h | 109 #define CLK_APMIXED_UNIVPLL 2 macro
|
| A D | mt8173-clk.h | 159 #define CLK_APMIXED_UNIVPLL 4 macro
|
| A D | mediatek,mt8365-clk.h | 233 #define CLK_APMIXED_UNIVPLL 2 macro
|
| A D | mt2712-clk.h | 13 #define CLK_APMIXED_UNIVPLL 1 macro
|
| A D | mt2701-clk.h | 177 #define CLK_APMIXED_UNIVPLL 3 macro
|
| A D | mt8192-clk.h | 302 #define CLK_APMIXED_UNIVPLL 1 macro
|
| A D | mt8195-clk.h | 369 #define CLK_APMIXED_UNIVPLL 10 macro
|
| /linux-6.3-rc2/drivers/clk/mediatek/ |
| A D | clk-mt6795-apmixedsys.c | 49 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000101, HAVE_RST_BAR,
|
| A D | clk-mt8195-apmixedsys.c | 80 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x01f0, 0x0700, 0xff000000,
|
| A D | clk-mt8173-apmixedsys.c | 65 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000000, HAVE_RST_BAR, 7,
|
| A D | clk-mt8135.c | 638 …PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x238, 0x250, 0xf3000000, HAVE_RST_BAR, 7, 0x238, 6, 0x0, 0x23…
|
| A D | clk-mt6797.c | 643 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0230, 0x023C, 0xFE000010, 0, 7,
|
| A D | clk-mt8516.c | 780 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
|
| A D | clk-mt8167.c | 1026 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
|
| A D | clk-mt2701.c | 964 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x220, 0x22c, 0xf3000000,
|
| A D | clk-mt2712.c | 1228 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0240, 0x024C, 0xfe000100,
|
| A D | clk-mt8192.c | 1025 PLL_B(CLK_APMIXED_UNIVPLL, "univpll", 0x0308, 0x0314, 0xff000000,
|
| A D | clk-mt8365.c | 833 PLL(CLK_APMIXED_UNIVPLL, "univpll2", 0x0208, 0x0214, 0xFF000001,
|