Searched refs:CLK_DIV_GDL (Results 1 – 8 of 8) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | exynos4.h | 238 #define CLK_DIV_GDL 459 macro
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| A D | exynos3250.h | 84 #define CLK_DIV_GDL 65 macro
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| /linux-6.3-rc2/Documentation/devicetree/bindings/interconnect/ |
| A D | samsung,exynos-bus.yaml | 271 clocks = <&cmu CLK_DIV_GDL>;
300 clocks = <&clock CLK_DIV_GDL>;
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | exynos4210.dtsi | 134 clocks = <&clock CLK_DIV_GDL>;
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| A D | exynos4412.dtsi | 119 clocks = <&clock CLK_DIV_GDL>;
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| A D | exynos3250.dtsi | 128 clocks = <&cmu CLK_DIV_GDL>;
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| /linux-6.3-rc2/drivers/clk/samsung/ |
| A D | clk-exynos3250.c | 337 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 4),
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| A D | clk-exynos4.c | 590 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
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