Searched refs:CLK_G3D (Results 1 – 14 of 14) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | exynos5250.h | 153 #define CLK_G3D 349 macro
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| A D | s5pv210.h | 112 #define CLK_G3D 94 macro
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| A D | exynos4.h | 114 #define CLK_G3D 276 macro
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| A D | exynos5420.h | 182 #define CLK_G3D 501 macro
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| A D | exynos3250.h | 188 #define CLK_G3D 182 macro
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| /linux-6.3-rc2/drivers/clk/samsung/ |
| A D | clk-s5pv210.c | 630 GATE(CLK_G3D, "g3d", "dout_hclkm", CLK_GATE_IP0, 8, 0, 0),
692 GATE(CLK_G3D, "g3d", "dout_hclkd", CLK_GATE_IP0, 8, 0, 0),
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| A D | clk-exynos5250.c | 546 GATE(CLK_G3D, "g3d", "div_aclk400_g3d", GATE_IP_G3D, 0,
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| A D | clk-exynos3250.c | 613 GATE(CLK_G3D, "g3d", "div_aclk_200", GATE_IP_G3D, 0, 0, 0),
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| A D | clk-exynos4.c | 728 GATE(CLK_G3D, "g3d", "aclk200", GATE_IP_G3D, 0, 0, 0),
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| A D | clk-exynos5420.c | 1265 GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9,
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | exynos4.dtsi | 402 * CLK_G3D is not actually bus clock but a IP-level clock.
405 clocks = <&clock CLK_G3D>,
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| A D | exynos3250.dtsi | 655 clocks = <&cmu CLK_G3D>,
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| A D | exynos5250.dtsi | 339 clocks = <&clock CLK_G3D>;
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| A D | exynos5420.dtsi | 845 clocks = <&clock CLK_G3D>;
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