Home
last modified time | relevance | path

Searched refs:CLK_I2C4 (Results 1 – 25 of 26) sorted by relevance

12

/linux-6.3-rc2/include/dt-bindings/clock/
A Dstm32fx-clock.h55 #define CLK_I2C4 29 macro
A Dactions,s900-cmu.h60 #define CLK_I2C4 42 macro
A Dexynos5250.h102 #define CLK_I2C4 298 macro
A Dexynos4.h159 #define CLK_I2C4 321 macro
A Dexynos3250.h216 #define CLK_I2C4 210 macro
A Dsprd,sc9860-clk.h94 #define CLK_I2C4 11 macro
A Drockchip,rv1126-cru.h101 #define CLK_I2C4 35 macro
A Drockchip,rk3588-cru.h149 #define CLK_I2C4 134 macro
A Drk3568-cru.h397 #define CLK_I2C4 334 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/clock/
A Dst,stm32-rcc.txt105 29 CLK_I2C4
/linux-6.3-rc2/arch/arm64/boot/dts/actions/
A Ds900.dtsi235 clocks = <&cmu CLK_I2C4>;
/linux-6.3-rc2/drivers/clk/
A Dclk-stm32f4.c1375 CLK_I2C4, "i2c4",
1526 CLK_I2C4, "i2c4",
/linux-6.3-rc2/drivers/clk/samsung/
A Dclk-exynos5250.c582 GATE(CLK_I2C4, "i2c4", "div_aclk66", GATE_IP_PERIC, 10, 0, 0),
A Dclk-exynos3250.c658 GATE(CLK_I2C4, "i2c4", "div_aclk_100", GATE_IP_PERIL, 10, 0, 0),
A Dclk-exynos4.c866 GATE(CLK_I2C4, "i2c4", "aclk100", GATE_IP_PERIL, 10,
/linux-6.3-rc2/arch/arm/boot/dts/
A Dstm32f746.dtsi334 clocks = <&rcc 1 CLK_I2C4>;
A Dexynos3250.dtsi774 clocks = <&cmu CLK_I2C4>;
A Dexynos4.dtsi551 clocks = <&clock CLK_I2C4>;
A Dexynos5250.dtsi417 clocks = <&clock CLK_I2C4>;
/linux-6.3-rc2/drivers/clk/actions/
A Dowl-s900.c639 [CLK_I2C4] = &i2c4_clk.common.hw,
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-rv1126.c520 COMPOSITE_NOMUX(CLK_I2C4, "clk_i2c4", "gpll", 0,
A Dclk-rk3568.c1339 GATE(CLK_I2C4, "clk_i2c4", "clk_i2c", 0,
A Dclk-rk3588.c1142 COMPOSITE_NODIV(CLK_I2C4, "clk_i2c4", mux_200m_100m_p, 0,
/linux-6.3-rc2/drivers/clk/sprd/
A Dsc9860-clk.c476 [CLK_I2C4] = &i2c4_clk.common.hw,
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/
A Drk3588s.dtsi1206 clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;

Completed in 58 milliseconds

12