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Searched refs:CLK_I2S (Results 1 – 20 of 20) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Ds5pv210-audss.h21 #define CLK_I2S 4 macro
A Dstm32fx-clock.h31 #define CLK_I2S 9 macro
A Dsuniv-ccu-f1c100s.h46 #define CLK_I2S 47 macro
A Dpxa-clock.h27 #define CLK_I2S 17 macro
A Dsun5i-ccu.h68 #define CLK_I2S 73 macro
A Dpistachio-clk.h26 #define CLK_I2S 35 macro
A Dexynos3250.h210 #define CLK_I2S 204 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/sound/
A Dimg,i2s-out.txt45 <&clk_core CLK_I2S>;
A Dtas571x.txt46 clocks = <&clk_core CLK_I2S>;
/linux-6.3-rc2/drivers/clk/samsung/
A Dclk-s5pv210-audss.c136 clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss", in s5pv210_audss_clk_probe()
A Dclk-exynos3250.c652 GATE(CLK_I2S, "i2s", "div_aclk_100", GATE_IP_PERIL, 21, 0, 0),
/linux-6.3-rc2/drivers/clk/
A Dclk-stm32f4.c1181 CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
1208 CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
1253 CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
1399 CLK_I2S, "i2s", i2s_parents, ARRAY_SIZE(i2s_parents),
/linux-6.3-rc2/arch/arm/boot/dts/
A Dsun5i-gr8.dtsi84 clocks = <&ccu CLK_APB0_I2S>, <&ccu CLK_I2S>;
A Ds5pv210.dtsi243 clocks = <&clk_audss CLK_I2S>,
244 <&clk_audss CLK_I2S>,
A Dexynos3250.dtsi856 clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>;
/linux-6.3-rc2/Documentation/devicetree/bindings/clock/
A Dst,stm32-rcc.txt84 9 CLK_I2S (I2S clocks)
/linux-6.3-rc2/drivers/clk/pistachio/
A Dclk-pistachio.c22 GATE(CLK_I2S, "i2s", "i2s_div", 0x104, 3),
/linux-6.3-rc2/drivers/clk/sunxi-ng/
A Dccu-suniv-f1c100s.c455 [CLK_I2S] = &i2s_clk.common.hw,
A Dccu-sun5i.c703 [CLK_I2S] = &i2s_clk.common.hw,
947 [CLK_I2S] = &i2s_clk.common.hw,
/linux-6.3-rc2/arch/mips/boot/dts/img/
A Dpistachio.dtsi139 <&clk_core CLK_I2S>;

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