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Searched refs:CLK_INFRA_PWM1_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7986-clk.h96 #define CLK_INFRA_PWM1_SEL 6 macro
A Dmediatek,mt7981-clk.h132 #define CLK_INFRA_PWM1_SEL 7 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7981-infracfg.c67 MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM1_SEL, "infra_pwm1_sel",
A Dclk-mt7986-infracfg.c57 MUX_GATE_CLR_SET_UPD(CLK_INFRA_PWM1_SEL, "infra_pwm1_sel",

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