Searched refs:CLK_MCU_BUS_SEL (Results 1 – 8 of 8) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | mediatek,mt8365-clk.h | 296 #define CLK_MCU_BUS_SEL 0 macro
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| A D | mt2712-clk.h | 291 #define CLK_MCU_BUS_SEL 2 macro
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| A D | mt8183-clk.h | 423 #define CLK_MCU_BUS_SEL 2 macro
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| /linux-6.3-rc2/Documentation/devicetree/bindings/interconnect/ |
| A D | mediatek,cci.yaml | 68 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
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| /linux-6.3-rc2/drivers/clk/mediatek/ |
| A D | clk-mt2712.c | 934 MUX_GATE_FLAGS(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0,
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| A D | clk-mt8183.c | 643 MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2),
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| A D | clk-mt8365.c | 546 MUX_GATE_FLAGS(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0,
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| /linux-6.3-rc2/arch/arm64/boot/dts/mediatek/ |
| A D | mt8183.dtsi | 285 clocks = <&mcucfg CLK_MCU_BUS_SEL>,
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