Searched refs:CLK_MM_DISP_OVL0 (Results 1 – 24 of 24) sorted by relevance
| /linux-6.3-rc2/drivers/clk/mediatek/ |
| A D | clk-mt6765-mm.c | 39 GATE_MM(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_ck", 7),
|
| A D | clk-mt8183-mm.c | 56 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 20),
|
| A D | clk-mt8167-mm.c | 62 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "smi_mm", 10),
|
| A D | clk-mt8186-mm.c | 35 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "top_disp", 2),
|
| A D | clk-mt6779-mm.c | 56 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 20),
|
| A D | clk-mt6797-mm.c | 60 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 15),
|
| A D | clk-mt8192-mm.c | 45 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "disp_sel", 2),
|
| A D | clk-mt6795-mm.c | 49 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 16),
|
| A D | clk-mt8173-mm.c | 63 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 16),
|
| A D | clk-mt2712-mm.c | 78 GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 16),
|
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | mt8167-clk.h | 89 #define CLK_MM_DISP_OVL0 10 macro
|
| A D | mediatek,mt6795-clk.h | 235 #define CLK_MM_DISP_OVL0 16 macro
|
| A D | mt6797-clk.h | 230 #define CLK_MM_DISP_OVL0 16 macro
|
| A D | mt6765-clk.h | 258 #define CLK_MM_DISP_OVL0 7 macro
|
| A D | mt8173-clk.h | 263 #define CLK_MM_DISP_OVL0 16 macro
|
| A D | mt2712-clk.h | 317 #define CLK_MM_DISP_OVL0 16 macro
|
| A D | mt6779-clk.h | 360 #define CLK_MM_DISP_OVL0 20 macro
|
| A D | mt8183-clk.h | 328 #define CLK_MM_DISP_OVL0 19 macro
|
| A D | mt8186-clk.h | 303 #define CLK_MM_DISP_OVL0 2 macro
|
| A D | mt8192-clk.h | 426 #define CLK_MM_DISP_OVL0 2 macro
|
| /linux-6.3-rc2/Documentation/devicetree/bindings/display/mediatek/ |
| A D | mediatek,ovl.yaml | 102 clocks = <&mmsys CLK_MM_DISP_OVL0>;
|
| /linux-6.3-rc2/arch/arm64/boot/dts/mediatek/ |
| A D | mt8173.dtsi | 1070 clocks = <&mmsys CLK_MM_DISP_OVL0>;
|
| A D | mt8192.dtsi | 1330 clocks = <&mmsys CLK_MM_DISP_OVL0>;
|
| A D | mt8183.dtsi | 1843 clocks = <&mmsys CLK_MM_DISP_OVL0>;
|
Completed in 31 milliseconds