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Searched refs:CLK_MM_DISP_PWM0_26M (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt2712-mm.c94 GATE_MM1(CLK_MM_DISP_PWM0_26M, "mm_pwm0_26m", "pwm_sel", 1),
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt2712-clk.h332 #define CLK_MM_DISP_PWM0_26M 31 macro

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