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Searched refs:CLK_MM_LVDSTX_PXL (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8365-mm.c71 GATE_MM1(CLK_MM_LVDSTX_PXL, "mm_flvdstx_pxl", "vpll_dpix", 2),
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmediatek,mt8365-clk.h339 #define CLK_MM_LVDSTX_PXL 34 macro

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