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Searched refs:CLK_MM_MDP_TDSHP0 (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6765-mm.c36 GATE_MM(CLK_MM_MDP_TDSHP0, "mm_mdp_tdshp0", "mm_ck", 4),
A Dclk-mt6795-mm.c41 GATE_MM0(CLK_MM_MDP_TDSHP0, "mm_mdp_tdshp0", "mm_sel", 8),
A Dclk-mt8173-mm.c56 GATE_MM0(CLK_MM_MDP_TDSHP0, "mm_mdp_tdshp0", "mm_sel", 8),
A Dclk-mt2712-mm.c70 GATE_MM0(CLK_MM_MDP_TDSHP0, "mm_mdp_tdshp0", "mm_sel", 8),
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmediatek,mt6795-clk.h227 #define CLK_MM_MDP_TDSHP0 8 macro
A Dmt6765-clk.h255 #define CLK_MM_MDP_TDSHP0 4 macro
A Dmt8173-clk.h256 #define CLK_MM_MDP_TDSHP0 9 macro
A Dmt2712-clk.h309 #define CLK_MM_MDP_TDSHP0 8 macro

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