Home
last modified time | relevance | path

Searched refs:CLK_MM_MM_DISP_WDMA0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8365-mm.c47 GATE_MM0(CLK_MM_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_sel", 11),
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmediatek,mt8365-clk.h316 #define CLK_MM_MM_DISP_WDMA0 11 macro

Completed in 5 milliseconds