Searched refs:CLK_MM_MM_DSI0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A D	clk-mt8365-mm.c	53 GATE_MM0(CLK_MM_MM_DSI0, "mm_dsi0", "mm_sel", 17),
/linux-6.3-rc2/include/dt-bindings/clock/
A D	mediatek,mt8365-clk.h	322 #define CLK_MM_MM_DSI0 17 macro

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