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Searched refs:CLK_MM_SMI_COMMON (Results 1 – 25 of 31) sorted by relevance

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/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt8167.dtsi136 clocks = <&mmsys CLK_MM_SMI_COMMON>,
137 <&mmsys CLK_MM_SMI_COMMON>;
A Dmt8186.dtsi485 <&mmsys CLK_MM_SMI_COMMON>,
1088 clocks = <&mmsys CLK_MM_SMI_COMMON>, <&mmsys CLK_MM_SMI_COMMON>,
1097 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1098 <&mmsys CLK_MM_SMI_COMMON>;
1108 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1109 <&mmsys CLK_MM_SMI_COMMON>;
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6765-mm.c51 GATE_MM(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_ck", 19),
A Dclk-mt2701-mm.c46 GATE_DISP0(CLK_MM_SMI_COMMON, "mm_smi_comm", "mm_sel", 0),
A Dclk-mt8183-mm.c36 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),
A Dclk-mt8167-mm.c52 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "smi_mm", 0),
A Dclk-mt8186-mm.c48 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "top_disp", 17),
A Dclk-mt6779-mm.c36 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),
A Dclk-mt6797-mm.c45 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),
A Dclk-mt8192-mm.c60 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "disp_sel", 17),
A Dclk-mt6795-mm.c33 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),
A Dclk-mt8173-mm.c48 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),
A Dclk-mt2712-mm.c62 GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0),
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8167-clk.h79 #define CLK_MM_SMI_COMMON 0 macro
A Dmediatek,mt6795-clk.h219 #define CLK_MM_SMI_COMMON 0 macro
A Dmt6797-clk.h215 #define CLK_MM_SMI_COMMON 1 macro
A Dmt6765-clk.h270 #define CLK_MM_SMI_COMMON 19 macro
A Dmt8173-clk.h248 #define CLK_MM_SMI_COMMON 1 macro
A Dmt2712-clk.h301 #define CLK_MM_SMI_COMMON 0 macro
A Dmt6779-clk.h341 #define CLK_MM_SMI_COMMON 1 macro
A Dmt8183-clk.h309 #define CLK_MM_SMI_COMMON 0 macro
A Dmt8186-clk.h316 #define CLK_MM_SMI_COMMON 15 macro
A Dmt2701-clk.h353 #define CLK_MM_SMI_COMMON 1 macro
A Dmt8192-clk.h441 #define CLK_MM_SMI_COMMON 17 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/memory-controllers/
A Dmediatek,smi-common.yaml179 clocks = <&mmsys CLK_MM_SMI_COMMON>,
180 <&mmsys CLK_MM_SMI_COMMON>;

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