Home
last modified time | relevance | path

Searched refs:CLK_MOUT_APLL (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dexynos5250.h176 #define CLK_MOUT_APLL 1028 macro
A Dexynos4.h32 #define CLK_MOUT_APLL 20 macro
A Dexynos5420.h234 #define CLK_MOUT_APLL 663 macro
A Dexynos3250.h77 #define CLK_MOUT_APLL 59 macro
/linux-6.3-rc2/drivers/clk/samsung/
A Dclk-exynos5250.c256 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
776 CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MPLL, CLK_CPU_HAS_DIV1, 0x200,
A Dclk-exynos4.c420 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
1232 CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_SCLK_MPLL,
1237 CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MPLL_USER_C,
A Dclk-exynos5420.c603 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
1555 CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MSPLL_CPU, 0, 0x200,
1562 CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MSPLL_CPU, 0, 0x200,
A Dclk-exynos3250.c322 MUX_F(CLK_MOUT_APLL, "mout_apll", mout_apll_p, SRC_CPU, 0, 1,
772 CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MPLL_USER_C,

Completed in 17 milliseconds