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Searched refs:CLK_MSDC_TOP_AES_0P (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8192-msdc.c25 GATE_MSDC_TOP(CLK_MSDC_TOP_AES_0P, "msdc_top_aes_0p", "aes_msdcfde_sel", 0),
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8192-clk.h395 #define CLK_MSDC_TOP_AES_0P 0 macro

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