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Searched refs:CLK_MSDC_TOP_P_MSDC0 (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8192-msdc.c29 GATE_MSDC_TOP(CLK_MSDC_TOP_P_MSDC0, "msdc_top_p_msdc0", "axi_sel", 4),
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8192-clk.h399 #define CLK_MSDC_TOP_P_MSDC0 4 macro
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt8192.dtsi1245 <&msdc_top CLK_MSDC_TOP_P_MSDC0>,

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