Searched refs:CLK_SCLK_MMC2 (Results 1 – 22 of 22) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | exynos5410.h | 28 #define CLK_SCLK_MMC2 134 macro
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| A D | exynos5250.h | 38 #define CLK_SCLK_MMC2 141 macro
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| A D | exynos7-clk.h | 59 #define CLK_SCLK_MMC2 6 macro
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| A D | exynos4.h | 60 #define CLK_SCLK_MMC2 147 macro
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| A D | exynos5420.h | 35 #define CLK_SCLK_MMC2 134 macro
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| A D | exynos3250.h | 257 #define CLK_SCLK_MMC2 249 macro
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| A D | exynos5433.h | 568 #define CLK_SCLK_MMC2 61 macro
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| /linux-6.3-rc2/drivers/clk/samsung/ |
| A D | clk-exynos5410.c | 176 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2",
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| A D | clk-exynos5250.c | 479 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2",
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| A D | clk-exynos3250.c | 546 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc2_pre",
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| A D | clk-exynos7.c | 521 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_sclk_mmc2",
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| A D | clk-exynos4.c | 771 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2", SRC_MASK_FSYS, 8,
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| A D | clk-exynos5420.c | 1010 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_mmc2",
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| A D | clk-exynos5433.c | 2315 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "mout_sclk_mmc2_user",
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| /linux-6.3-rc2/Documentation/devicetree/bindings/mmc/ |
| A D | samsung,exynos-dw-mshc.yaml | 143 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | exynos5410.dtsi | 156 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
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| A D | exynos3250.dtsi | 583 clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
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| A D | exynos4.dtsi | 341 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
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| A D | exynos5250.dtsi | 570 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
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| A D | exynos5420.dtsi | 345 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
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| /linux-6.3-rc2/arch/arm64/boot/dts/exynos/ |
| A D | exynos7.dtsi | 606 <&clock_top1 CLK_SCLK_MMC2>;
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| A D | exynos5433.dtsi | 1856 <&cmu_fsys CLK_SCLK_MMC2>;
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