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Searched refs:CLK_TOP_A1SYS_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7986-clk.h72 #define CLK_TOP_A1SYS_SEL 49 macro
A Dmediatek,mt7981-clk.h115 #define CLK_TOP_A1SYS_SEL 102 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7986-topckgen.c248 MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,
A Dclk-mt7981-topckgen.c372 MUX_GATE_CLR_SET_UPD(CLK_TOP_A1SYS_SEL, "a1sys_sel", a1sys_parents,

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