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Searched refs:CLK_TOP_APLL12_CK_DIV4 (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8516-clk.h200 #define CLK_TOP_APLL12_CK_DIV4 168 macro
A Dmediatek,mt8365-clk.h126 #define CLK_TOP_APLL12_CK_DIV4 116 macro
A Dmt8186-clk.h153 #define CLK_TOP_APLL12_CK_DIV4 134 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/sound/
A Dmt8186-afe-pcm.yaml144 <&topckgen 134>, //CLK_TOP_APLL12_CK_DIV4
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8186-topckgen.c678 DIV_GATE(CLK_TOP_APLL12_CK_DIV4, "apll12_div4", "apll_i2s4_mck_sel",
A Dclk-mt8516.c486 DIV_ADJ(CLK_TOP_APLL12_CK_DIV4, "apll12_ck_div4", "aud_i2s4_m_sel",
A Dclk-mt8167.c676 DIV_ADJ(CLK_TOP_APLL12_CK_DIV4, "apll12_ck_div4", "aud_i2s4_m_sel",
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt8186.dtsi946 <&topckgen CLK_TOP_APLL12_CK_DIV4>,

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