CLK_TOP_APLL_DIV_PDN5 (reference) in projects: linux-6.3-rc2

Searched refs:CLK_TOP_APLL_DIV_PDN5 (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A D	mt2712-clk.h	`214 #define CLK_TOP_APLL_DIV_PDN5 183 macro`
/linux-6.3-rc2/drivers/clk/mediatek/
A D	clk-mt2712.c	`986 GATE_TOP0(CLK_TOP_APLL_DIV_PDN5, "apll_div_pdn5", "i2si1_sel", 5),`

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