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Searched refs:CLK_TOP_AUD1_SEL (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7629-clk.h107 #define CLK_TOP_AUD1_SEL 97 macro
A Dmt8516-clk.h176 #define CLK_TOP_AUD1_SEL 144 macro
A Dmt7622-clk.h92 #define CLK_TOP_AUD1_SEL 80 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7629.c542 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
A Dclk-mt8516.c394 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
A Dclk-mt7622.c576 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
A Dclk-mt8167.c584 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt7622.dtsi624 <&topckgen CLK_TOP_AUD1_SEL>,

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