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Searched refs:CLK_TOP_AUD_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmediatek,mt7981-clk.h114 #define CLK_TOP_AUD_SEL 101 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7981-topckgen.c370 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_SEL, "aud_sel", aud_parents, 0x060,

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