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Searched refs:CLK_TOP_BUS_AXIMEM_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8192-clk.h15 #define CLK_TOP_BUS_AXIMEM_SEL 3 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8192.c559 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_BUS_AXIMEM_SEL, "bus_aximem_sel",

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