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Searched refs:CLK_TOP_EIP_B_SEL (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7986-clk.h74 #define CLK_TOP_EIP_B_SEL 51 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7986-topckgen.c254 MUX_GATE_CLR_SET_UPD(CLK_TOP_EIP_B_SEL, "eip_b_sel", eip_b_parents,
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt7986a.dtsi238 assigned-clocks = <&topckgen CLK_TOP_EIP_B_SEL>;

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